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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xin Li Fa Wang Shupeng Sun Chenjie Gu |
| Copyright Year | 2013 |
| Description | Author affiliation: Strategic CAD Labs., Intel Corp., Hillsboro, OR, USA (Chenjie Gu) || ECE Dept., Carnegie Mellon Univ., Pittsburgh, PA, USA (Xin Li; Fa Wang; Shupeng Sun) |
| Abstract | In this paper, we describe a novel statistical framework, referred to as Bayesian Model Fusion (BMF), that allows us to minimize the simulation and/or measurement cost for both pre-silicon validation and post-silicon tuning of analog and mixed-signal (AMS) circuits with consideration of large-scale process variations. The BMF technique is motivated by the fact that today's AMS design cycle typically spans multiple stages (e.g., schematic design, layout design, first tape-out, second tape-out, etc.). Hence, we can reuse the simulation and/or measurement data collected at an early stage to facilitate efficient validation and tuning of AMS circuits with a minimal amount of data at the late stage. The efficacy of BMF is demonstrated by using several industrial circuit examples. |
| Sponsorship | IEEE Counc. Electron. Design Autom. |
| Starting Page | 795 |
| Ending Page | 802 |
| File Size | 727617 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781479910717 |
| ISSN | 10923152 |
| DOI | 10.1109/ICCAD.2013.6691204 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-11-18 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Estimation Tuning Standards Integrated circuit modeling Solid modeling Bayes methods Gaussian distribution |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Computer Science Applications Software |
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