NDLI: Low-Voltage BiCMOS Circuit Topologies for the Design of a 19GHz, 1.2V, 466mW, 4-bit Accumulator in Silicon-Germanium

Content Provider	IEEE Xplore Digital Library
Author	Bethel, R. Kotecki, D.E.
Copyright Year	2007
Description	Author affiliation: Univ. of Maine, Orono (Bethel, R.; Kotecki, D.E.)
Abstract	Advanced silicon-germanium (SiGe) bipolar and complementary metal oxide semiconductor (BiCMOS) manufacturing processes require novel circuit design methodology to achieve high performance. The SiGe process leverages existing 120 nm silicon process advancements, but lower device breakdown voltages require new circuits to achieve low voltage operation. The SiGe heterojunction bipolar transistors (HBTs) with an $f_{t}$ over 200 GHz allow for high speed bipolar junction technology (BJT) logic blocks combined with high density and low power CMOS logic. This paper presents the design of a digital accumulator operating at 19 GHz with a 1.2 volt supply consuming only 466 mW of power. This architecture applies a modified differential pair logic family called the triple-tail cell to construct logic circuit with no stacked gates between the supplies. A folded logic technique is used to collapse logic that would normally be constructed from stacked differential pairs into parallel single stacked logic that is later recombined.
Starting Page	1127
Ending Page	1130
File Size	871799
Page Count	4
File Format	PDF
ISBN	9781424413775
DOI	10.1109/ICECS.2007.4511193
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-12-11
Publisher Place	Morocco
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	BiCMOS integrated circuits Circuit topology Germanium silicon alloys Silicon germanium CMOS logic circuits Logic devices Logic circuits Manufacturing processes Circuit synthesis Low voltage
Content Type	Text
Resource Type	Article

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