NDLI: A low operating power FinFET transistor module featuring scaled gate stack and strain engineering for 32/28nm SoC technology

Content Provider	IEEE Xplore Digital Library
Author	Chih-Chieh Yeh Chih-Sheng Chang Hong-Nien Lin Wei-Hsiung Tseng Li-Shyue Lai Tsu-Hsiu Perng Tsung-Lin Lee Chang-Yun Chang Liang-Gi Yao Chia-Cheng Chen Ta-Ming Kuan Xu, J.J. Chia-Cheng Ho Tzu-Chiang Chen Shyue-Shyh Lin Hun-Jan Tao Min Cao Chih-Hao Chang Ting-Chu Ko Neng-Kuo Chen Shih-Cheng Chen Chia-Pin Lin Hsien-Chin Lin Ching-Yu Chan Hung-Ta Lin Shu-Ting Yang Jyh-Cheng Sheu Chu-Yun Fu Shih-Ting Hung Feng Yuan Ming-Feng Shieh Chia-Feng Hu Wann, C.
Copyright Year	2010
Description	Author affiliation: Research & Development, Taiwan Semiconductor Manufacturing Company, No. 8, Li-Hsin 6th Rd., Hsinchu, Taiwan 30077, R.O.C. (Chih-Chieh Yeh; Chih-Sheng Chang; Hong-Nien Lin; Wei-Hsiung Tseng; Li-Shyue Lai; Tsu-Hsiu Perng; Tsung-Lin Lee; Chang-Yun Chang; Liang-Gi Yao; Chia-Cheng Chen; Ta-Ming Kuan; Xu, J.J.; Chia-Cheng Ho; Tzu-Chiang Chen; Shyue-Shyh Lin; Hun-Jan Tao; Min Cao; Chih-Hao Chang; Ting-Chu Ko; Neng-Kuo Chen; Shih-Cheng Chen; Chia-Pin Lin; Hsien-Chin Lin; Ching-Yu Chan; Hung-Ta Lin; Shu-Ting Yang; Jyh-Cheng Sheu; Chu-Yun Fu; Shih-Ting Hung; Feng Yuan; Ming-Feng Shieh; Chia-Feng Hu; Wann, C.)
Abstract	We show that FinFET, a leading transistor architecture candidate of choice for high performance CPU applications [1–3], can also be extended for general purpose SoC applications by proper device optimization. We demonstrate superior, best-in-its-class performance to our knowledge, as well as multi-Vt flexibility for low-operating power (LOP) applications. By high-k/metal-gate (HK/MG) and process flow optimizations, significant drive current (ION) improvement and leakage current (IOFF) reduction have been achieved through equivalent oxide thickness (EOT) scaling and carrier mobility improvement. N-FinFET and P-FinFET achieve, when normalized to Weff (Weff=2xHf+Wf), ION of 1325 µA/µm and 1000 µA/µm at 1 nA/µm leakage current under VDD of 1 V, and 960 uA/um and 690 uA/um at 1 nA/um under Vdd of 0.8V, respectively. This FinFET transistor module is promising for a 32/28nm SoC technology.
File Size	143022
File Format	PDF
ISBN	9781442474185
ISSN	2156017X
e-ISBN	9781424474202
e-ISBN	9781424474196
DOI	10.1109/IEDM.2010.5703473
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-12-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Passivation FinFETs Performance evaluation System-on-a-chip Strain Logic gates
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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