NDLI: High performance microwave static induction transistors

Please wait, while we are loading the content...

2015 IEEE International Electron Devices Meeting (IEDM)

2013 IEEE International Electron Devices Meeting

2012 International Electron Devices Meeting

2011 International Electron Devices Meeting

2010 International Electron Devices Meeting

2009 IEEE International Electron Devices Meeting (IEDM)

2008 IEEE International Electron Devices Meeting

2007 IEEE International Electron Devices Meeting

2006 International Electron Devices Meeting

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004.

IEEE International Electron Devices Meeting 2003

Digest. International Electron Devices Meeting,

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)

International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138)

International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318)

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)

International Electron Devices Meeting. IEDM Technical Digest

International Electron Devices Meeting. Technical Digest

Proceedings of International Electron Devices Meeting

Proceedings of 1994 IEEE International Electron Devices Meeting

Proceedings of IEEE International Electron Devices Meeting

1992 International Technical Digest on Electron Devices Meeting

International Electron Devices Meeting 1991 [Technical Digest]

International Technical Digest on Electron Devices

International Technical Digest on Electron Devices Meeting

Technical Digest., International Electron Devices Meeting

1987 International Electron Devices Meeting

1986 International Electron Devices Meeting

1985 International Electron Devices Meeting

1984 International Electron Devices Meeting

1983 International Electron Devices Meeting

Visible and infrared solid-state image sensors

Theoretical, practical and analogical limits in ULSI

Optical communication devices and subsystems

Submicron MOS VLSI process technologies

Characterization and modeling of the trench surface inversion problem for the trench isolated CMOS technology

A simplified box (buried-oxide) isolation technology for megabit dynamic memories

CMOS technology using SEG isolation technique

Device isolation technology by selective low-pressure silicon epitaxy

A two-dimensional SI oxidation model including viscoelasticity

Enhanced flow of phosphosilicate glass by ion implantation

Status and trends of $I^{2}L/MTL$ technology

Advanced VIST device technology

A new self-aligned transistor structure for high-speed and low-power bipolar LSI's

A merged CMOS/bipolar VLSI process

A 1.0µm N-well CMOS/Bipolar technology for VLSI circuits

Scaling of SOI/PMOS transistors

Modeling static and dynamic behavior of power devices

A unified bipolar device model

Improved COMFETs with fast switching speed and high-current capability

25 amp, 500 volt insulated gate transistors

Optimum design of power MOSFETs

1600V Power MOSFET with 20ns switching-speed

Extremely high efficient UHF power MOSFET for handy transmitter

High electron mobility transistors for LSI circuits

Optimization of HEMTs in ultra high speed GaAs integrated circuits

Deep level analysis in (AlGa)As-GaAs MODFETs by means of low frequency noise measurements

Contact technology in 3-5 device analysis and modification of metal-semiconductor contact interfaces in 3-5 devices

Ohmic contacts to n-GaAs with Germanide overlayers

Barrier heights from ohmic to bandgap: Modified Al:GaAs Schottky diodes by MBE

VIA GaAsFETs connected by photoelectrochemical plating

The clouded future of microwave tubes and solid state devices

A millimeter-wave tunneladder TWT

A 30 GHz 40 watt helix traveling-wave tube

A convergent confined-flow focusing system for millimeter wave tubes

Bonded grid electron gun for 95 GHz extended interaction amplifier (EIA)

A fifty megawatt klystron for the Stanford Linear Collider

Ion oscillation considerations for pulsed klystron amplifiers

Directions in CMOS technology

N-Well and p-well performance comparison

Comparison of latch-up in p- and n-well CMOS circuits

Resistanse modulation effect due to current injection and CMOS latch-up

Latch-up immunity against noise pulses in a CMOS double well structure

Characterization and modeling of transient latchup in CHMOS technology

Hot-electron effects in MOSFETs

Characterization of simultaneous bulk and interface high-field trapping effects in SiO2

Hot carriers induced degradation in thin gate oxide MOSFETs

Electrical properties of nitrided-oxide systems for use in gate dielectrics and EEPROM

Carrier tunneling related phenomena in thin oxide MOSFET's

Studies of interface phenomena at silicon grain boundaries

Characterization of n-channel and p-channel LPCVD polysilicon MOSFETs

Semiconductor chip design constraints imposed by package limitations

Directly light triggered 8KV-1, 2KA thyristor

Turn-off behaviour of GTO's: 2-D numerical results compared to IT-radiation patterns

Detailed comparison of experiment and theory of passivation ring structures for power devices

High performance microwave static induction transistors

A 900 MHz 100 W CW mesh emitter type transistor with P.H.S. structure

High voltage, high speed, GaAs Schottky power rectifier

An IGFET inversion charge model for VLSI systems

An optimized 0.5 micron LDD transistors

Statistical modeling for efficient parametric yield estimation of MOS VLSI circuits

An integrated IC process characterization facility

An automated methodology for generating self-consistent layout rules for VLSI designs

SIMPL-1 (SIMulated Profiles from the Layout-version 1)

HISETS: A software system for designing semiconductor device packages

Survey of recent gyrotron developments

First 200 kW CW operation of a 60 GHz gyrotron

Development of 35/53 GHz gyrotrons

A self-consistent nonlinear analysis of the gyrotron

Infrared monitoring of gyrotron windows

Tapered interaction gyro-TWA experiments

Design and operation of high-harmonic gyrotron oscillators and gyro-klystron amplifiers

Very low-threshold OMVPE-crown quantum-well lasers

Transverse-mode stabilized GaAlAs laser with an embedded confining layer on optical guide by MOCVD

Temperature dependence of wavelength tuning with semiconductor integrated etalon interference lasers

Twisted double-heterostructure GaAs-(AlGa)As laser

High temperature and long life operation of new InGaAsP/InP 1.3 µm buried crescent lasers

Room temperature pulsed operation of AlGaInp/GaInP double heterostructure visible light lasers grown by MOCVD

Recent advances in visible LEDs

GaAs LEDs fabricated on SiO2-coated Si wafers

A submicron CMOS megabit level dynamic RAM technology using doped face trench capacitor cell

A 1.3 µm N-MOS VLSI technology

A high performance, high density 256K DRAM utilizing IX projection lithography

Circuit design methodologies

Fully decoded GaAs 1 KB static RAM using closely spaced electrode FETs

A 1.5 micron HCMOS III technology for fast static RAMs

Soft error rates in static bipolar RAMs

Silicon on insulating substrates—Recent advances

Multilayer CMOS device fabricated on laser recrystallized silicon islands

Comparison of enhancement/depletion inverter speed in bulk Si and SOI circuits

Indirect laser annealing of PolySilicon for three-dimensional IC's

3-Dimensional SOI/CMOS IC's fabricated by beam recrystallization

Characteristics of MOS FET prepared on Si/MgO.Al2O3/SiO2/Si structure

High speed 1 µm SOS CMOS devices using double solid-phase epitaxy

A low-leakage VLSI CMOS/SOS process with thin EPI layers

Radiation tolerant direct-coupled MISFET logic on InP

Optimized MOSFETs with subquartermicron channel lengths

Series resistance modeling for optimum design of LDD transistors

Optimized and reliable LDD structure for 1 µm NMOSFET based on substrate current analysis

Device performance degradation to hot-carrier injection at energies below the Si-SiO2energy barrier

On the transient and steady-state transport of electrons and holes in the MNOS and MONOS devices

Bipolar device scaling limits from tunneling in base-emitter junctions

Integrated circuits for the control of high power

Practical size limits of high voltage IC's

A highly reliable 16 output high voltage NMOS/CMOS logic IC with shielded source structure

Lateral DMOS transistor optimized for high voltage BIMOS applications

A high performance high voltage lateral PNP structure

Experimental study of a high blocking voltage power MOSFET with integrated input amplifier

A monolithic high voltage SOS/CMOS operational amplifier

Computers and tubes—Today and tomorrow

Biperiodicity as liability and as asset in non-helix linear-beam TWT interaction structures

The development of a new analytical wave analysis of a free electron laser or ubitron

Dispenser cathodes: The current state of the technology

Theory of ubitron amplifier

Design of quick start, high current density electron guns

Proposing the gyro-peniotron with its operation analysis

High-speed InP-based photodetectors

High-speed InP/InGaAsP/InGaAs avalanche photodiodes

Long wavelength, wide spectral response (0.8-1.8µm) Al0.48In0.52As/Ga0.47In0.53As avalanche photodiodes and Al0.48In0.52As electroabsorption PIN avalanche detectors grown by molecular beam epitaxy

MBE AlxGa1-xAs/GaAs phototransistors sensitive at low illumination

Monolithically integrated In0.53Ga0.47As-PIN/InP-MISFET photoreceiver

A planar embedded InGaAs photodiode on semi-insulating InP substrate for monolithically integrated PIN-FET receivers, using selective vapor phase epitaxy and ion implantation technique

New optical detector using oxide superconductor BaPb0.7Bi0.3O3

High-speed optical modulation with GaAs/GaAlAs quantum wells in a p-i-n diode structure

An 8 megapixel/sec 800×800 virtual phase CCD imager scientific applications

A 360,000 pixel color image sensor for imaging photographic negatives

A high photosensitive IL-CCD image sensor with monolithic resin lens array

Blooming suppression mechanism for an interline CCD image sensor with a vertical overflow drain

A 3456 element quadrilinear CCD with depletion-isolated sensor structure

A new imaging device using amorphous silicon

A review of refractory gates for MOS VLSI

A high performance CMOS technology with Ti-Silicided p/n-type poly-Si gates

High-speed latchup-free 0.5-µm-channel CMOS using self-aligned TiSi2and deep-trench isolation technologies

An n-well CMOS with self-aligned channel stops

A fully-self-aligned joint-gate CMOS technology

Optimization of sub-micron p-channel FET structure

Fabrication demonstration of 1-1.5µ NMOS circuits using optical tri-level processing technology

Multi-level metallurgy for master image structured logic

Bipolar process technology evaluation by 3-dimensional device simulation

A planar metallization process—Its application to tri-level aluminum interconnection

VLSI Production with a multi-layer photolithography process

Electron-beam direct writing technology for LSI wiring process

An approach to quarter-micron e-beam lithography using optimized double layer resist process

Si MOSFET fabrication using focused ion beams

Single 5V EPROM with sub-micron memory transistor and on-chip high voltage generator

PROM Cell made with an EPROM process

A new mask ROM cell programmed by through-hole using double polysilicon technology

A new cell for high capacity mask ROM by the double LOCOS technique

High temperature and extended endurance characteristics of EEROM

Design considerations for scaling FLOTOX $E^{2}PROM$ cell

Optimum design of dual control gate cell for high density EEPROMs

Picosecond and subpicosecond optoelectronics for measurements of future high speed electronic devices

1/f Noise in GaAs MESFETs

Optimum profiles for low-noise ion-implanted GaAs MESFETs

X and Ku-band high power GaAs FETs

Electron-beam fabrication of quarter-micron T-shaped-gate FETs using a new tri-layer resist system

Performance and principle of operation of GaAs ballistic FET

GaAs—MESFETs with highly doped $(10^{18}cm^{-3})$ channels—An experimental and numerical investigation

InP JFETs by shallow Zn diffusion

Sensors with on-chip signal processing for long-term stability

A magnetic-field-sensitive multicollector transistor with low offset

Carrier transport in semiconductor magnetic field sensors

Monolithic integrated zinc-oxide on silicon pyroelectric anemometer

Removing long tails from photoconductive detectors: A new minority hole sinked photodetector

A new readout structure for radiation silicon strip detectors

Characterization of surface and buried channel ion sensitive field effect transistors (ISFET's)

Computer simulation in VLSI process modeling

Modeling rapid thermal annealing processes for shallow junction formation in silicon

Rapid-thermal annealing of a polysilicon-stacked emitter structure

Schottky barrier diodes with self-aligned floating guard rings

A new low resistance shallow junction formation method using lateral diffusion through silicide

Source and drain junctions by oxidizing arsenic doped polysilicon

Nondestructive evaluation of generation lifetime and surface generation velocity and the effect of etching, polishing and annealing on 5" Si wafer surface properties

High speed four-bit full adder with resistor coupled Josephson logic

Elimination of the emitter/collector offset voltage in heterojunction bipolar transistors

Double heterojunction GaAs-GaAlAs bipolar transistors grown by MOCVD for emitter coupled logic circuits

GaAsP-InGaAs superlattice light-emitting diodes

An In0.2Ga0.8As/GaAs, modulation-doped, strained-layer superlattice field-effect transistor

Ion-implanted strained-layer superlattice device

Recent developments in HgCdTe photovoltaic devices grown on alternative substrates using heteroepitaxy

Electrical characterization of LPE n-p Hg0.8Cd0.2Te/CdTe heterojunctions

n-Channel MISFETs on long wavelength p-Hg1-xCdxTe

Origin of noise currents in ion-implanted MW Hg1-xCdxTe PV arrays

Diffusion limited dark current in n-type (Hg,Cd)Te MIS devices

A PtSi Schottky-barrier infrared MOS area imager with large fill factor

Monolithic 128 × 128 InSb FPA's for staring infrared imaging systems

A new floating gate cell and technology for a 5 volt only CMOS 16K EEPROM

The dual gated diode switch—A merged structure for bidirectional current switching

Unipolar transistor based on charge injection

A self-aligned 1-µm CMOS technology for VLSI

Structure-dependent MOSFET degradation due to hot-electron injection

A new opto-sensitive power monolithic device for power control

GaAlAs buried multi-quantum-well laser fabricated by diffusion induced disordering

A 1024 × 1024 virtual phase CCD imager

SiGMOS—A silicon gigabit/s NMOS technology

Submicron self-aligned recessed gate InGaAs MISFET exhibiting very high transconductance

VLSI Device fabrication using a unique, highly-selective Si3N4dry etching

Twin channel laser (TCL) with high CW power and low beam divergence

1982 International Electron Devices Meeting

1981 International Electron Devices Meeting

1980 International Electron Devices Meeting

1979 International Electron Devices Meeting

1978 International Electron Devices Meeting

1977 International Electron Devices Meeting

1976 International Electron Devices Meeting

1975 International Electron Devices Meeting

1974 International Electron Devices Meeting (IEDM)

1973 International Electron Devices Meeting

1972 International Electron Devices Meeting

1971 International Electron Devices Meeting

1970 International Electron Devices Meeting

1969 International Electron Devices Meeting

1968 International Electron Devices Meeting

1967 International Electron Devices Meeting

1966 International Electron Devices Meeting

1965 International Electron Devices Meeting

1964 International Electron Devices Meeting

1963 International Electron Devices Meeting

1962 International Electron Devices Meeting

1961 International Electron Devices Meeting

1960 International Electron Devices Meeting

1959 International Electron Devices Meeting

1957 International Electron Devices Meeting

1956 International Electron Devices Meeting

1955 International Electron Devices Meeting

High performance microwave static induction transistors

Content Provider	IEEE Xplore Digital Library
Author	Cogan, A. Regan, R. Bencuya, I. Butler, S. Rock, F.
Copyright Year	1983
Description	Author affiliation: GTE Laboratories Incorporated, Waltham, MA (Cogan, A.)
Abstract	This paper describes recent developments in silicon high-voltage, high-power microwave static induction transistor (SIT) technology. We have developed SITs which are capable of cw output power levels greater than 100W in the 200 MHz to 400 MHz frequency band and 25W in the 900 MHz to 1200 MHz frequency band at 120V dc operating voltage. These SITs demonstrate the highest performance with respect to the combination of power, frequency, gain, efficiency and bias voltage of any semiconductor device reported to date. Un addition to describing two dimensional modeling, the processing sequence and high frequency characterization techniques will be outlined. Also, an improved SIT geometry, the Recessed Gate SIT (RGSIT), will be introduced.
Starting Page	221
Ending Page	224
File Size	284606
Page Count	4
File Format	PDF
DOI	10.1109/IEDM.1983.190481
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1983-12-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Microwave transistors Frequency Geometry Voltage Packaging National electric code Power generation Performance gain Numerical analysis Conductivity
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in