NDLI: "Solder ball" formation in silicon alloy transistors

Content Provider	IEEE Xplore Digital Library
Author	Hakim, E.B. McSherry, L.K. Reich, B.
Copyright Year	1965
Description	Author affiliation: U.S. Army Electronics Command, Fort Monmouth, N. J. (Hakim, E.B.)
Abstract	Summary for only given, as follows. This report discusses the investigation and solution of the so-called "solder ball," problem which has plagued the transistor industry for years. Upon investigating silicon alloy transistors which use tin for electrodes, it was discovered that "solder balls" (which can cause internal short-circuiting of the device) are not necessarily associated with manufacturing procedures as previously believed, but are produced by the devices themselves because of the material used in construction. Electrical stresses or high temperatures produce balls in units which initially were free of any foreign matter. This is due to the low melting temperature tin alloy used in the transistor's (or other semiconductors) construction. Thus, devices may have balls when put in use and later cause equipment failure. The devices appear good under all measurements. However, when the device is in use, a mechanical shock may shake a ball loose, shorting the transistor and making the circuit inoperable.
Starting Page	36
Ending Page	36
File Size	98674
Page Count	1
File Format	PDF
DOI	10.1109/IEDM.1965.187568
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1965-10-20
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon alloys Temperature Construction industry Manufacturing industries Electrodes Building materials Semiconductor materials Equipment failure
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Solder ball formation in silicon alloy transistors

Solder ball formation in silicon alloy transistors

A wafer surface temperature measurement method utilizing the reordering phenomena of amorphous silicon

An Experimental Study on Voids in Mixed Alloy Assemblies

Failure Reporting, Analysis And Corrective Action System In The US Semiconductor Manufacturing Equipment Industry: A Continuous Improvement Process

Nano-technology in silicon foundries

Implementing I.R. technology in semiconductor industries

Substrate-strained silicon technology: process integration [CMOS technology]

The synthrsis of potassium hexatitanate and manufacturing alkaline fuel cell matrix

"Solder ball" formation in silicon alloy transistors

Similar Documents

Solder ball formation in silicon alloy transistors

Solder ball formation in silicon alloy transistors

A wafer surface temperature measurement method utilizing the reordering phenomena of amorphous silicon

An Experimental Study on Voids in Mixed Alloy Assemblies

Failure Reporting, Analysis And Corrective Action System In The US Semiconductor Manufacturing Equipment Industry: A Continuous Improvement Process

Nano-technology in silicon foundries

Implementing I.R. technology in semiconductor industries

Substrate-strained silicon technology: process integration [CMOS technology]

The synthrsis of potassium hexatitanate and manufacturing alkaline fuel cell matrix

"Solder ball" formation in silicon alloy transistors