NDLI: Grid Architecture for High Performance Computing

Content Provider	IEEE Xplore Digital Library
Author	Derbal, Y.
Copyright Year	2007
Description	Author affiliation: Ryerson Univ., Toronto (Derbal, Y.)
Abstract	In theory, a grid can harness the power of an arbitrarily large collection of computing resources to meet the needs of compute intensive high performance computing (HPC) applications such as finite element model (FEM) simulations. However, the realization of such potential faces many challenges; including: (1) the degree of coupling between the components of an HPC application; (2) the asynchronous and high latency nature of the grid communication medium; and (3) the presence of distinct administrative domains. High latency poses the most serious limitation to the potential use of grids for HPC applications. In this respect, the paper reports new results on the ongoing development of a service oriented grid architecture to support the execution of HPC applications, and in particular the simulation of large scale dynamical systems. At the heart of the architecture is a computational model that ties the domain decomposition of the simulated system to the topology of the grid and the data exchange process in order to minimize the effect of latency. The paper provides an experiment-based comparative analysis of the proposed grid-HPC computational model against a sequential computing model for a two dimensional heat diffusion process simulation.
Starting Page	514
Ending Page	517
File Size	273579
Page Count	4
File Format	PDF
ISBN	1424410207
ISSN	08407789
DOI	10.1109/CCECE.2007.134
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-04-22
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer architecture High performance computing Computational modeling Grid computing Delay Finite element methods Large-scale systems Heart Topology Diffusion processes
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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