NDLI: Power-Efficient High Intercept-Points Mixers for Wireless Communications

Content Provider	IEEE Xplore Digital Library
Author	Rohde, U.L. Poddar, A.K. Almeida, A.P. Ahmed, V.
Copyright Year	2006
Description	Author affiliation: Synergy Microwave Corp., Paterson, NJ (Rohde, U.L.; Poddar, A.K.; Almeida, A.P.; Ahmed, V.)
Abstract	A unified approach of designing cost-effective, power-efficient and high intercept point passive double balanced mixer (DBM) is reported. This work is based on switching devices as a mixing cell (dual FETs) where gate's capacitances are resonated by using hybrid resonance network for minimization of LO power level and nonlinearity of the mixing cell. The passive reflection FET mixers based on present approach can operate with low noise figure and high dynamic ranges without the need of excessively high LO drive level. This paper is based on patent pending approach that gives input intercept points $(IIP_{3})$ in excess of 40 dBm and conversion loss less than 9.5 dB with the LO power typically 17 dBm for the frequency bands (RF: 650-1500 MHz, LO: 700-1700 MHz, IF: 50-200 MHz). The interport isolation is improved by minimizing signal leakage between ports through amplitude and phase cancellation techniques, and is better than 30 dB for broadband applications. To our knowledge, the mixer circuits reported in this work exhibit best performance (for this class of circuits and given size and cost) to date, and easily amenable for integration in MMIC form. The circuit topology is not limited to these frequencies, and can be easily extended for other frequency band to meet the requirement of present and later generation of communication systems
Starting Page	2331
Ending Page	2336
File Size	7699811
Page Count	6
File Format	PDF
ISBN	1424400384
DOI	10.1109/CCECE.2006.277397
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-07
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wireless communication FETs Circuits Frequency Communication switching Capacitance Resonance Minimization Acoustic reflection Noise figure RF DBM FET IIP3 IF LO MMIC
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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