NDLI: Panel: Logic Emulation: A Niche or a Future Standard for Design Verification?

Content Provider	IEEE Xplore Digital Library
Author	Rose, J.
Copyright Year	1993
Description	Author affiliation: Univ. of Toronto, Toronto, Ontario, Canada (Rose, J.)
Abstract	Logic Emulations systems consist of boards of re-programmable Field-Programmable Gate Arrays (FPGAs) programmable interconnect, and large software synthesis and analysis packages. They allow ASIC and system-level designs to be represented in hardware that performs at a significant fraction of the real device speeds. They can be used in the end-product for system-level debugging and analysis. As a result, they present an opportunity to perform faster and more accurate design verification. This panel will focus on the role of logic emulation in design verification and will consider the following questions: - Do the benefits of time-to-market and better end product quality justify the investment in logic emulation? - How do logic emulation systems compare with other quick prototyping methods, such as: 1)Build-your-own FPGA prototype on a printed-circuit board, and 2)Build-your-own FPGA prototype using Field-Programmable Interconnect Chips/Device - How does logic emulation compare with traditional simulation in speed, capacity and convenience, including the newer compiled-code simulators? - What is the relationship with special-purpose hardware simulation accelerators? - Will logic emulation be used to verify designs at architectural level? - Does logic emulation only apply to certain types of applications? - Will the emulation speed become a critical barrier to market acceptance? - What will be the effect of declining emulation cost? - What role does logic emulation play in software/hardware co-design?
Starting Page	164
Ending Page	164
File Size	51036
Page Count	1
File Format	PDF
ISBN	0897915771
ISSN	0738100X
DOI	10.1109/DAC.1993.203939
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-06-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Logic design Emulation Logic devices Field programmable gate arrays Hardware Virtual prototyping Programmable logic arrays Software packages Packaging Application specific integrated circuits
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in