NDLI: Semi-analytical current source modeling of FinFET devices operating in near/sub-threshold regime with independent gate control and considering process variation

Content Provider	IEEE Xplore Digital Library
Author	Tiansong Cui Yanzhi Wang Xue Lin Nazarian, S. Pedram, M.
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA (Tiansong Cui; Yanzhi Wang; Xue Lin; Nazarian, S.; Pedram, M.)
Abstract	Operating circuits in the near/sub-threshold regime can lower the circuit energy consumption at the expense of lowering the circuit speed. In addition near/sub-threshold can result in higher sensitivity to process-induced variations and transient noise. FinFETs have been proposed as an alternative to planar CMOS devices in sub-20nm CMOS technology nodes due to their more effective channel control, steep sub-threshold slope, high ON/OFF current ratio, low power consumption, and so on. Characteristics of FinFETs operating in the near/sub-threshold regime make it difficult to verify the timing of a circuit using conventional statistical static timing analysis (SSTA) techniques. Current source modeling (CSM) methods, which have been proposed to increase the accuracy of timing analysis in dealing with arbitrary shapes of the input signal waveforms, are the appropriate solution for performing SSTA on FinFET-based circuits. This paper thus extends the CSM to such circuits, operating in the near/sub-threshold voltage regime. In particular, FinFET devices with independent gate control and subject to process variations are modelled. The key idea of the proposed CSM approach is to combine non-linear analytical models and low-dimensional CSM lookup tables to simultaneously achieve high modeling accuracy and low time/space complexity.
Sponsorship	IEEE Circuits Syst. Soc.
Starting Page	167
Ending Page	172
File Size	231815
Page Count	6
File Format	PDF
ISBN	9781479928163
DOI	10.1109/ASPDAC.2014.6742884
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-20
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates FinFETs Threshold voltage Capacitance Integrated circuit modeling Table lookup
Content Type	Text
Resource Type	Article

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