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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ramesh, N. Chaudhary, V. |
| Copyright Year | 1993 |
| Description | Author affiliation: Dept. of Comput. Sci., Wayne State Univ., Detroit, MI, USA (Ramesh, N.) |
| Abstract | Many low level vision tasks that are computationally intensive are easily parallelizable. The lack of parallel processing systems, or their prohibitive costs, have prevented the move of vision processing algorithms from single processor systems to multiprocessor systems. With the recent spurt of parallel processing hardware, there is a need to investigate the feasibility of using such machines for some vision algorithms. Speedup is an important factor in determining the feasibility of migration from single processor systems to parallel processors. In this work, we investigate a particular segmentation algorithm and present theoretical speedup results. Our formula can work out numerical speedups by simply plugging in the parameter values.< |
| Starting Page | 903 |
| Ending Page | 906 |
| File Size | 434555 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780317602 |
| DOI | 10.1109/MWSCAS.1993.343214 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1993-08-16 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Image analysis Image segmentation Computer vision Parallel processing Neural networks Computer science Concurrent computing Costs Multiprocessing systems Hardware |
| Content Type | Text |
| Resource Type | Article |
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