NDLI: A new piecewise-linear simulation algorithm using switch-level pattern dynamics

Content Provider	IEEE Xplore Digital Library
Author	Asai, H. Suzuki, S.
Copyright Year	1992
Description	Author affiliation: Dept. of Opt-electron. & Mech. Eng., Shizuoka Univ., Hamamatsu, Japan (Asai, H.; Suzuki, S.)
Abstract	Describes a novel piecewise-linear simulation technique, which is classified between the previous switch-level simulation and the circuit (or timing) level one, for bipolar transistor circuits. In this method, a piecewise-linear model with a switch is adopted as a diode. Tracing the regions is carried out by the transition of the switch state patterns. First, the node voltages and the branch currents are obtained by solving the linear equation based on the modified nodal approach at each iteration. Based on these computation results, the switch state /sup z/k+1 at the next iteration is determined by the switch control which is defined as the consistent switching method. Iteration is repeated until /sup z/k+1=/sup z/k, namely, the switch state pattern converges. Since the plural switch states can alter simultaneously, efficient tracing can be performed. The authors apply the proposed algorithm to the DC analysis of bipolar digital circuits and show its availability.<>
Starting Page	899
Ending Page	902
File Size	245634
Page Count	4
File Format	PDF
ISBN	0780305930
DOI	10.1109/ISCAS.1992.230076
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1992-05-10
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Piecewise linear techniques Switches Circuit simulation Switching circuits Timing Bipolar transistor circuits Diodes Voltage Equations Algorithm design and analysis
Content Type	Text
Resource Type	Article

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