NDLI: Signal delay in distributed RC tree networks

Please wait, while we are loading the content...

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)

2012 IEEE International Conference on Circuits and Systems (ICCAS)

2012 IEEE International Symposium on Circuits and Systems

2011 IEEE International Symposium of Circuits and Systems (ISCAS)

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

2009 IEEE International Symposium on Circuits and Systems

2008 IEEE International Symposium on Circuits and Systems

2007 IEEE International Symposium on Circuits and Systems

2006 IEEE International Symposium on Circuits and Systems

2005 IEEE International Symposium on Circuits and Systems

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003.

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)

Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94

1993 IEEE International Symposium on Circuits and Systems

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

1991., IEEE International Sympoisum on Circuits and Systems

IEEE International Symposium on Circuits and Systems

IEEE International Symposium on Circuits and Systems,

1988., IEEE International Symposium on Circuits and Systems

1988 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.88CH2458-8)

An application of chaos: generating binary pseudo-random sequences

Stochastic control techniques applied to chaotic nonlinear systems

Computation of domains of attraction in the state-space of second degree nonlinear circuits and systems

The hysteresis chaos generator family

An algebraic criterion for the onset of chaos in nonlinear dynamical systems

A new combined time-delay adaptive filter

On frequency domain adaptive filters using the overlap-add method

The mixed transversal and ladder adaptive filters with pulse order updates

Adaptive covariance-type internally symmetric algorithm for LS FIR filtering with linear phase

Stochastic versus deterministic concepts in adaptive systems design

Design of complex coefficient FIR digital filters using weighted approximation

Two robust Remez methods for the design of FIR digital filters meeting prescribed specifications

Design of FIR partial response filter pairs with equiripple stopband attenuation (class I and IV)

A procedure for efficient FIR filter design using prefilters

Simultaneous amplitude and phase approximation for FIR filters

A high-speed 22-bit floating-point digital signal processor: the FSPU

Some alternative techniques for hardware address generators for digital signal processors

A testable CMOS signal processor for fast Fourier transforms

Optimal code generation based on modular system descriptions

A pipelined signal processor for real-time generation of radar images

Multidimensional systems: present state and future prospects

Polynomial approach to pole placement in MIMO n-D systems

On the geometry of 2D systems

On the use of separable filters in approximating 2-D transfer functions

Singular multidimensional linear discrete systems

On routing and performance comparison of techniques for packet-switched networks using learning automata

Architecture of a new ASIC data communication circuit intended for the ISO levels 3, 4, 5: network, transport and session

A switching circuit scheme for a satellite site diversity system

A digital FSK discriminator circuit

A suboptimum maximum likelihood detector for severely distorted data signals using a sorting breadth-first strategy

Solution of nonlinear equations in the synthesis of linear networks

Some algorithmic problems of linear network solvability

An iterative technique for polynomial factorization

A state-space realization for matrix fraction descriptions: applications to model order reduction and circuit synthesis

SYNCOM-the procedure of linear network synthesis and its application in CMOS filter design

A high-swing class-AB CMOS operational amplifier

Gain-bandwidth restrictions for FET amplifiers with parasitic drain-to-gate coupling

Efficient linearization of broadband amplifiers with more than an octave bandwidth by adequate combining compensation technique and negative feedback

On a new CMOS resistor implementation for linear analog IC signal processing applications

CMOS op amp dimensioning using multiphase optimization

On the diameters of survivable networks

The design and control of dynamic memory networks

Near-optimal broadcasting figures in computer networks

Design and cost evaluation of simple interconnection circuits for multiprocessor systems

Message broadcast in point-to-point computer networks

Force-observe, a new design for testability approach (CMOS VLSI circuits)

Fault-tolerant array processors: an approach based upon A*N codes

Repair of redundant memories by reduced covering

Design of testable storage/logic arrays

Design of a defect-tolerant and fully testable PLA

A vector quantizer with short-time memory for digital image coding

Video compression techniques: networking aspects

A DSP architecture for 64 kbps motion video codec

Bigchair-DPCM, a new method for visually irrelevant coding of pictorial information

Simple and efficient CMOS circuit for fast VLSI adder realization

A horizontal optimization algorithm for data path/control synthesis

Evaluating 'A+B=K' conditions in constant time

An easily reconfigurable, circuit switched connection network

A testable NORA CMOS serial-parallel multiplier

A codimension-3 bifurcation problem and its application to electrical circuits

Charge bifurcation structure of a basic RC driven relaxation oscillator

Routes to chaos in Duffing oscillator with one potential well

Synchronization and chaos in a real discrete phase-locked loop

A study of the chaotic phenomena in Chua's circuit

A simplified block LMS algorithm

New concurrent transversal batch algorithm for multichannel filters

Fast frequency domain implementation of a block IIR filter with application

Adaptive noise cancelling by accelerated gradients techniques

A highly parallel block processing algorithm for LS FIR filtering

Perfect reconstruction QMF structures which yield linear phase FIR analysis filters

An adaptive normalized lattice algorithm for LS FIR multichannel filters with linear phase

Efficient linear phase FIR filter structures exploiting recursive subfilters

On the use of a linear phase lattice structure in Prony's method for spectral line estimation

VLSI array processors: designs and applications

A parallel implementation of large-scale circuit simulation

Parallel algorithms for physical design

Wavefront computations of band-limited matrix operations on a torus data-driven array: FEM-TORUS

Parallel exhaustive search for several NP-complete problems using content addressable memories

Stability of multidimensional systems: overview and new results

Linear algorithms for computing closed loop polynomials of 2-D systems

The computation of positive definite solutions to the 2-D Lyapunov equation via a matrix Riccati equation

2-D spectral factorization: classical and nonnegativity constrained

Minimum sensitivity structure of 2-D digital filters based on the Fornasini-Marchesini model

Integrated parallel scrambler design for high-speed transmission systems

Performance evaluation of digital signal transmission channels on coronating power lines

Performance study of Kalman adaptive equalizer for high speed data transmission over the HF channel

A digital frequency synthesizer with a phase accumulator

A 1 GHz CMOS prescaler for RF synthesizers

Lower bounds for the stability margin of linear discrete systems based on the weighted performance criteria

New stability conditions for matrix polynomials using a block-bidiagonal form

Stability analysis of linear active circuit containing periodically switched resistors

A 2-D algebraic stability test

An experimental verification of thermal simulation by WATAND for a bipolar RF power transistor

Dynamic high frequency phenomena in the base-emitter junction of bipolar transistors

Circuit simulation models for the high electron mobility

Modeling and simulation of doped channel heterostructure FETs and integrated circuits

Accurate analog modeling of short channel FETs based on table lookup

A general approach to sensitivity analysis in power systems

Bounding the processing time of forward-chaining rule-based systems

Mathematical modelling of electricity distribution systems with several voltage levels

A simulation method for the detailed time response of power systems including multiterminal DC links

Weighted random pattern testing based on test counts

SLOPE: a test pattern generator based on stop line oriented path end algorithm

A closer look at multiple faults and defect levels in digital circuits

Multiple bus fault diagnosis in digital data systems

Effectiveness of fault detection for low-overhead self-testing VLSI circuits

Image-sequence compression on a 68020-based multi-processor system

Coding of colour picture using potential method

Model based movement compensation and interpolation for ISDN videotelephony

Image compression and coding, with emphasis on polygon based techniques and representation

A scalable synchronous system

True single phase clock dynamic CMOS circuit technique

Data flow approach to self-timed logic in VLSI

A new CMOS circuit representation for timing verification

Automated analysis of timing faults in synchronous MOS circuits

Logic gate formed neuron type processing element

Speech recognition network with SC neuron-type components

Neural networks using analog multipliers

Generalization in layered classification neural networks

Neural net based digital halftoning of images

Active attenuation of acoustic noise using adaptive algorithms

Adaptive noise cancelling with systolic arrays

Comparison of the stochastic iteration algorithm and the dual sign algorithm in nonstationary environments

Sigma-delta modulation adaptive digital filter

A comparison of two IIR filter structures for adaptive digital filtering

Analysis of even order IIR digital filters implemented as a cascade of first order complex allpass sections

A synthesis of low-sensitivity digital filters using T-cascade of wave lattice sections

Digital bilinear LDI ladder filters using lattice equivalents and wave concepts

Tridiagonal state-space digital-filter structures

Wave digital ladder filters with low sensitivity and roundoff noise

Efficient algorithms for distributed query processing in star and extended-star networks

Distributed algorithms in faulty networks

A general index mapping technique for array reconfiguration

Testability conditions for two-dimensional bilateral arrays

A parallel processing scheme for tree-structured image generation system

From algorithm conception to product manufacture: an automated design approach

Automatic full-custom design of application specific DSP VLSI

Automated synthesis of a high speed Cordic algorithm with the Cathedral-III compilation system

Implementation aspects of a decision feedback equalizer ASIC using an automatic layout generation system

Design and verification of a digital adaptive equalizer ASIC

Rapid approximative calculation and optimization of PLL-FM-demodulation threshold

A new carrier regeneration scheme for QAM signals

Performance improvement of all digital phase-locked loop with adaptive multilevel-quantized phase comparator

Synchronization in a discrete phase-locked loop

Frequency domain analysis of sampling phase-locked loops

A singular system realization for arbitrary matrix fraction descriptions

Complete LU decomposition conjugate residual method and its performance for large-scale circuit simulation

Latency exploitation in circuit simulation by sparse matrix techniques

Reducing the parallel solution time of sparse circuit matrices using reordered Gaussian elimination and relaxation

Improved numerical stability of sparse matrix reduction method

An equivalent circuit model for two-stage operational amplifiers

Long-term and short-term frequency stabilities in sinusoidal oscillators

On charge-pump phase-locked loops modelling

Computationally efficient determination of threshold voltages in narrow-channel and short-channel MOSFETs using infinite-network manipulations

Extraction of BJT model parameters with a new strategy improving speed and accuracy

Truncated fractal basin boundaries in three machine power systems

Contingency-constrained reactive power planning and scheduling

Can voltage security indices predict voltage collapse problems in large-scale power networks?

A nodal aggregation algorithm for linearized two-time-scale power networks

On the nonexistence of energy functions for power systems with losses

Fault modeling for physical failures for CMOS circuits

Fault modeling for MOS digital circuits using current limited switch

Fault modelling and collapsing in MOS circuits

Generating valid tests for static CMOS-circuits based on a delay model

An approach to design totally self-checking checker for the 1-out-of-3 code at transistor level

Video chip set for data rate compression by filtering and DPCM coding

A one chip VLSI for real time two-dimensional discrete cosine transform

A 30 MHz programmable CMOS video FIR filter and correlator

Anti-aliasing VLSI digital filters for video signal coders

A graph build algorithm for layout compaction using binary search tree

A new scheme for improving placement of rectangular blocks

geoADDICTION-flexible handling of complex geometries in IC layout tools

Soft macro cell generation by two dimensional folding

Net assignment in gate matrix layout

On transitions between quasilinear and relaxational regimes in self-oscillators

On synthesis and design of multi-stable devices

Resistive circuits with several solutions

Negative differential resistance in two-transistor one-ports with no internal sources

Some qualitative aspects of neural computing circuits

VLSI architectures for associative networks

The gradient type LS algorithm for adaptive spectrum estimation

Data pre-processing for high-resolution adaptive algorithms

Multistage implementation of parameter-invariant null filter and its application to discrimination of closely spaced sinusoids

A mu -vector LMS adaptive system for enhancing nonstationary narrow-band signal

On bounds for the coefficient search space with application to discrete optimization in a class of wave digital filters

A design technique for recursive linear time-varying digital filters

On the design of maximally flat nonrecursive digital bandpass and bandstop filters

Multistage approach to narrowband digital filters

Direct form revisited: recursive filter implementation using higher-order direct form sections

Design of an array processing unit for an array processor

Ringtree: a VLSI architecture for fast image generation and processing

Design and implementation of high-speed asynchronous communication ports for VLSI multicomputer nodes

Fast scientific computation in CMOS VLSI shared-memory multiprocessors

SPRINT: a signal processing ring network for high speed applications

Quantization error analysis of image sub-band filter banks

Optimum analysis/synthesis filter bank structures with application to sub-band coding systems

IIR filterbank for subband coding of images

Design of perfect reconstruction multi-dimensional filter banks using cascaded Smith form matrices

The LOT: a link between block transform coding and multirate filter banks

A tutorial on digital subscriber line transceiver for ISDN

An evolutionary VLSI chip set for ISDN

ISDN echo cancellation circuit (IEC), a transceiver for the subscriber loop

VLSI signal generation in echo canceler transceiver

Considerations in the VLSI circuit implementation of 2B1Q transceivers

About the internal mechanisms of dynamical and feedback control systems

Frequency demultiplication phase-locking of relaxation oscillations for BNRT

Operator algebra of the discrete time-variant linear systems

Assignment of system zeros using a new numerically stable algorithm (multivariable systems)

A new approach to characterize stationary network properties

SPICE simulation of load resistance with distributed capacitance

AUSPICE-an expert system to assist simulations with SPICE

A unified mixed-mode digital/analog simulation environment

SAPEC-a personal computer program for the symbolic analysis of electric circuits

Applications of global flow analysis in logic synthesis

A new method of constructing Lyapunov functions for power systems

Evaluation of the applicability of the network flow approach to the emergency service restoration problem

Detection of damper winding currents and the damping coefficient of a synchronous machine using a predictor corrector estimator

Short time stabilization of power systems via line switching

The role of participation factors in reduced order eigenanalysis of large power systems

Location of faulty subnetworks in analog network

Inverse star-mesh transformation and network-element-value observability

Fault analysis and parameter identification in linear circuits in terms of topological matrices

Fault diagnosis and calibration of large analog circuits

Diagnosability of analog circuits-a graph theoretical approach

A general nonlinear filter structure for image processing

On nonlinear methods in image processing and pattern recognition

Adaptive nonlinear image restoration using the theory of convex projections

Theory of convex projection and its application to image restoration

PRINT methodology: a compilation approach for cell library generation

Automatic synthesis system of sequential circuits

Silicon compiler generates fast multipliers embedded in data path

A standard cell automated layout for a CMOS 50 MHz 8*8 bit pipelined parallel Dadda multiplier

A generator-based method for designing application specific DSPs

Cellular neural networks

Qualitative analysis of neural networks

Hysteresis in neural-type circuits

Circuit design criteria for stable lateral inhibition neural networks

On the analysis and design of neural nets with an implementation via CMOS VLSI

Switched-capacitor filter networks derived from general parameter bandpass LC ladder networks

Exact synthesis of SC filters using forward difference integrators

Z-domain synthesis of switched-capacitor LDI ladder filters

Wave SC filters based on two-port equivalents

Matrix methods for switched-capacitor filter design

McClellan transformation for two-dimensional IIR digital filter design

New results on the two-step design method

The design and application of a high quality three dimensional linear trajectory filter

2D FIR eigenfilters

A new approach for 2D narrow band circularly symmetric filter design

Analysis of dataflow program graphs

Design and implementation of adaptive filters

Signal processor code generation: an analytic study and practical consideration

Block diagram compilation and graphical editing of DSP algorithms in the QuickSig system

Implementation of DSP applications using the AT&T DSP32 C compiler and application library

Nonlinear matched filtering and neural networks

Optical processing for machine vision

Optical digital computing and interconnections

Elimination of transients in LPC based vocoders

A voice pattern matching LSI based on a new speaker-independent continuous voice recognition scheme

Discrete cosine transform magnitude and phase coefficients used for vector quantization in a speech transform coder

A variable rate sampling delta modulator

A jointly optimized adaptive recursive echo canceller with adaptive equalizer and line enhancer

Analysis and simulation of multiprocessor based packet switching systems

Optimization of circuits by sampling in solid angle segments bordered by ellipsoids

Circuit theoretical techniques as the tool of signal processing

Optimal varying dyadic structure models of time invariant systems

Implicit steepest descent method and its analogy with charge-up method based on virtual capacitors in network analysis

Circuit simulation on a hypercube

PILA: a computer program for fast and accurate analysis of piecewise linear circuits

SUGAR: an event driven circuit simulator

An efficient modelling technique for computing the parasitic capacitances in VLSI circuits

Time-domain analysis methods for switching convertors

Time averaging equivalent circuit analysis for a class of periodically switching linear network

A unified formulation technique for the analysis of periodically switched networks

A new average model of switching converters

Analysis of single flying capacitor converter by the state-space averaging technique

Fault analysis of nonlinear circuits from node voltage measurements

Sensitivity based testing of nonlinear circuits

Fault location of linear nonreciprocal circuit with tolerance

A new approach to sensitivity computation of microwave circuits

Multi-fault diagnosis of DC-nonlinear analog circuits

A new approach to analog fault diagnosis and an experimental diagnostic system

The design of a symmetrical diplexer composed of canonical Butterworth two-port networks

Fundamental factorization theorems for rational matrices over complex or real fields

On complex-normalized reflection coefficients of a terminated lossless two-port network

Positioning of group delay sections with an LC ladder and the effects of transformations

Modelling of analog networks by digital circuits

An integrated CAD environment for design of testable VLSI circuits

The SPH-graph: a model to support VLSI design

On graph representation of incomplete VLSI circuits

An efficient design methodology for standard cell circuits

Design of a half-toning integrated circuit based on analog quadratic minimization by non linear multistage switched capacitor network

Numerical analysis of simultaneous nonlinear algebraic equations

Solving nonlinear resistive networks by a homotopy method using a rectangular subdivision

Finding multiple solutions of piecewise-affine resistive circuits

A simple method for all solutions of a piecewise linear network

Application of the block Jacobi method to piecewise-linear analysis of DC diode-transistor networks

Design of very low sensitivity fully differential band-pass switched-capacitor filters

A switched capacitor time-division-multiplexed pole sharing technique for linear phase bandpass filterbanks

A novel technique for the reduction of capacitance spread in high-Q SC circuits

Performances of bandpass cascaded SC filters with reduced pole-Qs

Switched-capacitor biquad building block with offset-insensitive time-continuous feedback integrators

Design and implementation of 3-D recursive digital filters by applying spectral transformations to LC filter networks

Two-dimensional polyphase filter banks with arbitrary number of subband channels

Synthesis of nonreciprocal 2-D filters

Symmetry and 2-D recursive digital filtering

Efficient high speed delayed multipath two-dimensional recursive digital filter architecture

Alias cancellation and distortion elimination in multi-dimensional QMF banks

Programmable digital filter for high speed applications

Digital narrow band pass filters for FSK-modems

FIR filters suitable for high rate processing using general purpose 16-bit mu Ps

Implementation of recursive and nonrecursive digital filters using the single multiplexed ROM in the quadratic residue number system

A new modular VLSI filter architecture using computationally efficient recursive digital filter topology

Graph theory in the context of VLSI and CAD

Rectilinear drawing of a graph on a plane with the minimum number of line segments

Generalized graph decomposition and its applications

On the Voronoi diagram of a nondirected flow network

Design of a zero delay subband acoustic echo canceller

A new echo canceller realized by high performance digital signal processor

A voiced/unvoiced classified vector quantized speech transform coder implemented on a TMS 32020 signal processor

Modification of a radio link system from analog to digital

System identification through first and second order information from the periodogram

Complex modelling of real system based on positive frequency range

A new technique for ARMA system modelling

Numerical approach for signal delay in general distributed networks

Fast on-chip delay estimation for cell-based emitter coupled logic

Multi-level circuit partitioning for switch-level timing simulation

PENELOPE: a graph based logic simulator for MOS circuits

An ASIC-based PWM waveform generator for AC motor control applications

Stability analysis of periodic solutions in PWM feedback control systems with power converters by the second method of Lyapunov

Synthesis of optimal discrete pulse modulation waveforms through an integer quadratic program

Transient analysis of DC to DC converters in discontinuous operation mode by using alternator equations

A contribution to the theory of fluorescent lamp circuits

SAW filters for radio communication systems

Some fast algorithms for SAW filter design

Finite element analysis of SAW-transducers

Design and analysis of a new structured adaptive SAW filter

A new configuration for SAW resonator based oscillators

Determination of discrete transfer function from its real (or imaginary) part on the unit circle

The general biquadratic transformation of polynomials

Structurally passive resonator-based digital filters

An extension to the lossless inverse scattering problem and application to spectral approximation

Deviation of phase of second-order discrete-time filters

The use of PROLOG for connectivity verification

A graph theoretic approach to single row routing problems

A three-layer router for standard cell VLSI circuits

A theoretically optimal and practically fast algorithm for VLSI geometrical design rule verification

A new approach for circuit extraction based on overlay graph

Analogue design techniques for high speed GaAs operational amplifiers

1 GHz GaAs ADC building blocks

GaAs MESFET switched-capacitor linear-median hybrid filter

Gain-bandwidth enhancement in GaAs MESFET wideband amplifiers

High frequency switched capacitor filters for CMOS technology

SC-filter structures with reduced requirements on op-amp bandwidth and settling time

On design of switched-capacitor filters with the voltage-inverter-switch approach

Parasitic-compensated building blocks for active switched-capacitor filters

Formulations for switching transformation matrices of large switched networks

An efficient structure for nonlinear L- and C-filtering

Selective median filters

Parallel implementation of a median filtering algorithm

Sine wave responses of median type filters

Nonlinear C-filters for nonstationary signals and deconvolution in impulsive noise

A fully parallel VLSI implementation of distributed arithmetic

A self-testing systolic module for VLSI DSP applications

Two-dimensional recursive digital filtering: pipelining, one- and two-dimensional block processing

Efficient VLSI-realizable decimators for sigma-delta analog-to-digital converters

Primitive operator digital filter synthesis using a shift biased algorithm

A problem on rectangular floorplans

Properties of graphs containing wild components

An optimal cardinality-constrained territory map on a network

Area-efficient drawings of rectangular duals for VLSI floor-plan

Scheduling jobs on a tree-connected processor system

Implementing signal processing functions on ternary encoded delta-modulated pulse streams

Envelope and instantaneous phase considerations in speech modelling

Receiver structures for trellis-coded multipoint QAM signals transmitted through dispersive channels

A modular multiprocessor system and its application to real-time speech coding

Invariants and characteristics of sigma-differential pulse code modulation

On H/sub infinity / filtering in multivariable discrete-time systems

Disturbance decoupling and disturbance decoupled estimation in decomposed systems

Multivariable model-reference adaptive control

Overdetermined spectral analysis of short data records

Large deviation exits from a running orbit in the Josephson junction

CMOS ASIC devices for the measurement of short time intervals

A programmable sense amplifier for read only memories

Optimization of a back bias generator for NMOS VLSI

GaAs buried-channel MESFET analog integrated circuits

Readout of IR detector arrays below LHe temperatures

Analysis of tap-changer dynamics and construction of voltage stability regions

Transient stability evaluation of electric power systems using a fuzzy Perceptron algorithm

Investigation of subsynchronous resonance risk in the 380 kV Turkish electric network

New power theory of the 3-phase non-linear asymmetrical circuits supplied from nonsinusoidal voltage sources

Reliability evaluation as part of computer-aided power distribution network design

Design of multilevel mixed-mode simulator for LSI/VLSI circuits

Convergence properties of relaxation methods in the DC analysis of large MOS circuits

Convergence of waveform relaxation method

Waveform relaxation applied to transient device simulation

A circuit simulator based on the waveform-relaxation method using selective overlapped partition and classified latencies

State-of-the-art and future prospects for analogue signal processing-a tutorial

Optimum implementation of a multistage IIR SC bandpass decimator for a voiceband analogue interface system

A novel technique for designing continuous-time filters in MOS technology

A novel approach for high-frequency pipelined A/D conversion

Design of high-speed, wide-band MOS oscillators for monolithic phase-locked loop applications

An analytical method for optimal module orientation

Automatic building of graphs rectangularly dualisable for use in IC floorplanning

An O(n)-time standard cell placement algorithm using constrained multi-stage graph model

A new class of optimization algorithms for circuit design and modelling

A new floorplanning method with global routing based on functional partitioning

Novel high-speed integrated heterostructure transistors, photodetectors, and optoelectronic circuits

Heterostructure bipolar transistors and circuits

GaAs IC technology, circuits, and systems

Heterostructure FETs for high speed applications

Analysis and design of nonideal switched capacitor networks

A sparing SC filter design approach with reduced transmission zeros

Automated SC filter generation with a CMOS gate array type filter chip

Adaptive simulated annealing used in the synthesis of switched capacitor filters

An exhaustive generation of switched-capacitor circuits: a symbolic simulation and artificial intelligence approach

Median filters: a tutorial

Recursive algorithms and VLSI implementations for median filtering

Realizations of a class of nonlinear filters using a bit-serial approach

Median type filters for color signals

Wave digital filters using carry-save arithmetic

Implementation of bit-serial recursive digital filters

A VLSI systolic filter with ternary coefficients for delta-modulated signals

Counter-based residue arithmetic circuit for VLSI digital signal processing systems

Application of number theory to structurally passive digital filters

Nibble-serial: an architecture for VLSI digital signal processors

Minimum length linear transistor arrays in MOS

New trends in circuit design via expert system

A novel approach to CAD of analog cells

An algorithm for one-sided 1/sub 1/ optimization with application to circuit design centering

Statistical MOS VLSI circuit optimization with non-nested experimental design

Signal processing requirements in pan-European digital mobile communications

A digital single sideband modulator

Digital implementation of a coherent CPM system for mobile radio

Design of a non-coherent receiver for PRCPM signals using Viterbi algorithm

A comparison between CELP and MPLPC at 8 kbit/s for mobile communications

On finding and modelling nested permutations in graphs

On an order of reviving inaccessible nodes eliminated with the repeated use of a generalized star to polygon transformation

On dual Eulerian paths and circuits in plane graphs

A new scheme for the Steiner problem in graphs

On partitioning for pseudo exhaustive testing of VLSI circuits

3-connectivity augmentation problems

Fast efficient algorithms for the factoring of multiple output logic functions

Goal-oriented synthesis of switching functions

An artificial intelligence approach to PLA optimization

New heuristics for the exact minimization of logic functions

Synthesis of speed-independent circuits from algebraic specifications

High level control of security and optimizing functions

Assessing security assessment

Language oriented data structures and their applications to power system operation and training

Decision trees applied to on-line transient stability assessment of power systems

Inductive inference of model structure using hypothesis feedback

Analysis and evaluation of expert's knowledge for power system restoration by mathematical programming method

A novel radix-2 pipeline architecture for the computation of the DFT

Generalized algorithm of short discrete cosine transform

Fourier analysis of continuous data using DFTs

A perfect interpolation of discrete Fourier transform

A new efficient algorithm for computing a few DFT points

Comparison of equivalent precision dedicated FFT processors

Design and application of integrated analog interface circuits

Analog CMOS circuits for ISDN

A CMOS subscriber line audio processing circuit including adaptive balance

Concepts for the restitution of video signals using MOS analog circuits

A single-chip peer-relationship optical transceiver

Novel pipeline data converters

Design of VLSI implemented signal processing systems based on signal flow graph analyses

Algorithm-architecture mapping for custom DSP chips

Automated generation of multiprocessor arrays

Analysis and modeling of sequential iterative algorithms for parallel and pipeline implementations

On mapping of DSP algorithms onto hardware

Image processing VLSI design through functional match between algorithms and architecture

Nonlinear systems and input-output representations

Active, resistive, nonlinear, uniform, infinite ladder networks

Stabilization of chaos-an algebraic theory

Chaos from phase-locked loops

On switch-induced distortion in switched capacitor circuits

Computer-aided analysis of general RSC circuits containing capacitive loops

Influence of op-amp nonidealities and switch-on resistances on SC integrator

New s-z transformation and its switched capacitor realization

A sensitive steady-state discriminator function for nonlinear switched networks with application to SCNs containing signal-controlled switches

Interpolated FIR filters using cyclotomic polynomials

Computationally efficient wideband filters with very narrow transition bands

Efficient multirate realization for narrow transition-band FIR filters

Floating-point signal processing-arithmetic, roundoff-noise, and limit cycles

Bit-rate reduction for high-quality audio signals using floating-point wave digital filters

A floating-point vector signal processor (ZSP-325) with concurrent architectures

A speed enhancing architecture for a floating point signal processor

An optimal floating-point pipeline CMOS CORDIC processor

Physical modelling of microwave field effect transistors: a review

A simplified approach to optimum noise source impedance determination for GaAs FET amplifiers

A novel method for the modelling and the design of MESFETs and of any kind of heterojunction FET

The design of microwave subsystems based on a device physical model

2-D interpolation, matrix factorization and applications to signal processing

Fast adaptive identification and restoration of images degraded by blur and noise

Estimation and identification for 2-D block Kalman

Reduced order strip Kalman filtering using singular perturbation method

A generalized technique for the synthesis of 2-D state-space digital filters with minimum roundoff noise

Stability analysis of 2-D digital filters having second kind singularities-analog approach

On the multidimensional generalization of scattering Hurwitz property of complex polynomials

Stability analysis of three-dimensional state-space systems

Symmetry conditions for 2-D complex irreducible polynomials

Accurate modeling and simulation of parallel interconnection in high-speed integrated circuits

CMOS circuit speed optimization based on switch level simulation

A formal approach towards electrical verification of synchronous MOS circuits

An accurate and efficient multiple delay simulator for MOS logic circuits using polynomial approximation

Verification of robustness of digital CMOS circuits

Applications of signal and image processing to medicine

Random signal applications in biomedical engineering

Computer-aided electromyography

EMG signal discrimination for controlling walking functions in paraplegics under electrical stimulation

Variability of single event-related brain potentials

The master-slave IIR filter adaptation algorithm

A new stable algorithm for adaptive digital IIR filter

State-space adaptive recursive filters

Analysis of alternative realizations of adaptive IIR filters

High-frequency fully-tuned CMOS transconductance-C filter

Signal flow graph OTA-C integrated filters

Frequency limitations of continuous-time OTA-C filters

Noise performances of OTA-C filters

A canonical continuous-time MOSFET-capacitor filter with high linearity

An algorithm for automatic channel definition for custom VLSI layout consisting of rectilinear shape blocks

A non-minimal wire length algorithm for complex routing problems

Automatic multilayer routing for surface mounted technology

Saturation phenomena in the wiring space of electronic circuits

Embedding interconnection nets in square lattices

Equalisation of analogue to digital converter nonlinearities

Generalized modified nodal formation for circuits with nonlinear resistive multiports described by sample data

Frequency domain modeling of dual-input/multiple-output quadratic systems with general random inputs

Highly accurate digital sinusoidal oscillators using controlled rounding

A construction method of Lyapunov functions for piecewise-linear systems

Switched-capacitor frequency-to-voltage and voltage-to-frequency converters based on charge-balancing principle

SC networks with zero amplifier finite gain sensitivity

On the differential operation circuit based on the switched capacitor circuit

Application of SC MOS delta and delta-sigma modulators to nonlinear signal processing

An improved switched-capacitor inductance simulation circuit using unity gain buffers

A tutorial on multirate digital filter banks

Perfect reconstruction FIR filter banks: lapped transforms, pseudo QMFs and paraunitary matrices

An analytic signal processing approach to digital polyphase transmultiplexing: theory and design

Existence of unique solutions for multirate FIR filters based on Lagrange multipliers

The design of a systolic array with tags input

A systolic algorithm for the fast computation of the connected components of a graph

A VLSI systolic quadratic residue DFT with fault tolerance

An algorithm transformation technique for multi-dimensional DSP systolic arrays

Practical methods of device and circuit modelling

Application of spectral-balance to the design of non-linear microwave circuits. Steady-state response, sensitivity analysis and optimization

Comparison of computational methods for MESFET intermodulation characteristics

Modelling of millimeter wave two terminal devices and related circuits

A nonlinear PIN diode model for use in multi-diode microwave and RF communication circuit simulation

Fractal based image coding scheme using Peano scan

Performance of a multicomputer type DSP system 'NOVI' for motion picture coding

Evaluation of motion estimation procedure for low-frame-rate aerial images

Polyphase FIR filters for the demodulation of chrominance signals

Optimization of a sigma-delta modulator by the use of a slow ADC

Fully differential CMOS sigma-delta modulator for high performance analog-to-digital conversion with 5 V operating voltage

Wave digital decimation filters in oversampled A/D converters

Quantization error spectrum of sigma-delta modulators

Modeling the quantizer in higher-order delta-sigma modulators

Bounds on signal delay in RC mesh networks

Simulated annealing method for clustering problem in large-scale systems

Extracting simple but accurate RC models for VLSI interconnect

Tree relaxation: a new iterative solution method for linear equations

Toward structural adaptivity

The role of interpretation and diagnosis in signal processing

Knowledge-based signal understanding

Knowledge based support for EEG recording

Global and local control of processing using knowledge-based signal processing techniques-an application

Neural network implementation for an adaptive maximum-likelihood receiver

System considerations for adaptive modelling applied to active noise control

A fetal ECG signal monitoring system using digital signal processor

Adaptive microphone array system for noise reduction (AMNOR) and its performance studies

Acoustic noise cancellation in a multiple noise source environment

An active RC filter capable of easy lowpass-highpass transformation

Generation of transconductance grounded capacitor filters by signal-flow graph simulation of LC-ladders

Passive symmetrical RLC filters suitable for active simulation

A method to relax the design of active filters against large GB-variations

Evaluation of the large-signal behaviour of active filters

A fast heuristics for optimal CMOS functional cell layout generation

ALLADIN: a CMOS gate matrix layout system

An interactive layout generation tool for CMOS analog ICs

An edge-oriented compaction scheme based on multiple storage quad tree

Two-dimensional layout compaction by simulated annealing

Transfer functions for nonlinear systems via Fourier-Borel transforms

Coprime fractional representations of nonlinear systems

A constructive algorithm to estimate the stability regions of nonlinear dynamical systems

Consolidation of Lagrangian functionals for mathematical modelling of dissipative systems

Synthesis method for switched-capacitor FIR decimators and interpolators

Exact analysis of non-ideal SC networks through op amps asymptotic modeling

Compensation for amplifier finite bandwidth in the design of switched capacitor networks

Switched-capacitor realization of a Walsh transform circuit and its application to sequency filtering

Hybrid adaptive control of linear systems by parallel processing and switched capacitor techniques

Exact design of arbitrary parasitic-insensitive elliptic SC-ladder filters in the z-domain

FIR transfer functions with arbitrary amplitude and phase, with application to the design of quasi-all-pass delay equalizers

Design of flat-group delay IIR filters with prescribed amplitude characteristics

Ripple and transition-width trade-off in the design of elliptic filters

Simultaneous amplitude and phase approximation for lumped and IIR-filters

Systematic design of systolic arrays using mapping algorithm

Systolic model and systolic geometry

Systolic arrays for LU decomposition

On the hierarchical design of VLSI processor arrays

Systematic design of two-level pipelined systolic arrays with data contraflow

Minimal phase shift microstrip PIN diode attenuators

Low input resistance transimpedance optical preamplifier for fibre optic local area networks

Design of an L-band monolithic GaAs receiver front-end with low power consumption

A fast hopping frequency synthesizer for agile radar

Nonlinear equalizer for controlling AM-PM conversion and AM compression

Adaptive filters based on local estimates

Evaluation of the variance function for edge enhancement in multidimensional data

Adaptive-length median filters for image processing

Stable nonlinear recursive filters for edge enhancing noise smoothing of images

A network for multiscale image segmentation

Measuring harmonic distortion and noise floor of an A/D convertor using spectral averaging

A current mode algorithmic analog-to-digital converter

A CMOS implementation of a video-rate successive approximation A/D converter

A ratio-independent cyclic A/D conversion technique

Stochastic analog-to-digital conversion using asynchronous sampling

Piecewise polynomial models for MOSFET DC characteristics with continuous first order derivative

Table models for device modelling

GLASMOST: a MOSFET model of high numerical quality

Simultaneous extraction of GaAs MESFET channel and gate diode parameters and its application to circuit simulation

Analysis of GaAs-FET noise properties at VHF-/UHF-frequencies

Picosecond holography-a new diagnostic tool?

Automatic interpretation of echocardiograms-a computer vision approach

Sound alerting aids for the profoundly deaf

Self adaptive filtering of noise from speech: a hearing aid application

EEG transitions in the learning process of simple tasks

A DSP breath sound analyser

Computational complexity and accuracy issues in fast least squares algorithms for adaptive filtering

A continuously variable digital delay element

Adaptive detection and enhancement of multiple sinusoids using a cascade IIR filter

The LMS algorithm with momentum updating

A constrained two-dimensional adaptive digital filter with reduced computational complexity

Dynamic range and finite word effects in digital implementation of the LMS algorithm

Current mode signal processing circuits

Design of high-frequency active RC-filters using passive compensation methods

Noise and sensitivity optimization of actively compensated active RC filters based on Friend-Deliyannis SAB

Novel method for realizing higher-order immittance function using current conveyors

Synthesis of immittance function using current conveyors

A systolic circuit for fast Hartley transform

Image correlation using a bit level systolic array

Pipeline implementation of Pisarenko's method for high resolution 2-D spectrum estimation

VLSI implementation of pipelined linear system solver

Implementation of fast angle calculation and rotation using on-line CORDIC

Relaxation based spectral analysis for nonlinear electronic circuits

Canonical modeling of nonlinear devices through circuit optimization

The continuous-time MOSFET-C Wien-bridge oscillator circuits for VLSI

Computer approach for nonlinear forced oscillators

Maximum power transfer in weakly nonlinear circuits

Reduction of roundoff noise in frequency sampling digital filters

Roundoff noise generated by orthogonal building blocks in signal processing structures

Discrete optimization by combining local search and design centering techniques

Determination of all existing limit cycles in high-order cascade- and parallel-structures of recursive digital filters

From recursive algorithm to parallel VLSI accelerator: a hierarchical design system with testbed

Multiprocessor reconfiguration techniques

Bit level processor arrays: current architectures and a design and programming tool

Synthesis of concurrent hardware structures

Systolic building block for high performance recursive filtering

PRESAGE, a tool for the design of low-cost systolic circuits

Computer aided double matching via parametric representation of Brune functions

The analytic theory of semiuniform lossy broadband matching networks

Suspended substrate strip line filters with flat delay

From the indefinite-impedance and scattering matrices to the port-based indefinite-scattering matrix

An application of equivalent transformations for analysis of nonuniform transmission lines

The digital morphological sampling theorem

Theory and VLSI implementation of multilevel median filters

Generalized stack filters and minimum mean absolute error estimation

Morphological 3-D segmentation using laser structured light

Binary morphological coding of grayscale images

Reduction methods of capacitor mismatch errors in switched-capacitor A/D, D/A converters

A new digital-to-analog conversion algorithm

High-resolution low-power CMOS D/A converter

A triple low-power voltage output video 8-bit CMOS DAC

Switched-capacitor digital-analogue converters with built-in FIR filtering

Signal delay in RC networks with floating capacitors

Signal delay in distributed RC tree networks

Dispersive transmission line model for nonlinear time domain circuit analysis

Transient analysis of a class of mixed lumped and distributed constant circuits

A new interconnection delay model considering the effects of short-channel logic gates

Transistor-only frequency-selective circuits

A differential input/output integrator without p-n-p transistors and its application to leapfrog filter synthesis

Nonlinear performance of composite-amplifier filters

Generation and design of sinusoidal oscillators using OTAs

Linear frequency networks with applications to 'frequency set-on' oscillators

High-speed analog-to-digital conversion with GaAs technology: prospects, trends and obstacles

Gigabit transmitter/receiver GaAs IC chip set for optical communications

Systolic array realization of 2-D linear phase FIR digital filters

High efficiency 64 kb/s video codec based on a hybrid quantization

Algorithms to select optimum matched performance of programmable filters in telephone networks

Routh type approximation for discrete system

Subfilter approach for designing efficient FIR filters

Signal delay in distributed RC tree networks

Content Provider	IEEE Xplore Digital Library
Author	Chengson, D. Frazao, C. Wang, H.W. Billett, B.
Copyright Year	1988
Description	Author affiliation: Tandem Comput. Inc., Cupertino, CA, USA (Chengson, D.; Frazao, C.; Wang, H.W.; Billett, B.)
Abstract	The authors examine signal delay associated with distributed RC tree networks, and present an algorithm for computing distributed RC time constants. Skew measurements from a bipolar test chip utilizing various flip-flop loading configurations were used. The computer implementation of the algorithm used to check clock skew limits on a large bipolar ECL (emitter-coupled logic) gate array is also presented. On-chip clock skew, metal delays, and hold time margins are being analyzed and managed with this algorithm. The algorithm was implemented as an integral part of Tandem's CAD-based VLSI physical design system and is part of the system-wide clock skew management methodology.<>
Starting Page	2835
Ending Page	2837
File Size	182900
Page Count	3
File Format	PDF
DOI	10.1109/ISCAS.1988.15529
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1988-06-07
Publisher Place	Finland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Clocks Delay effects Logic arrays Algorithm design and analysis Computer networks Distributed computing Semiconductor device measurement Testing Flip-flops Logic gates
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in