NDLI: Transputer based back-propagation neural net emulation system

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2015 IEEE International Symposium on Circuits and Systems (ISCAS)

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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2012 IEEE International Symposium on Circuits and Systems

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Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003.

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)

Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94

1993 IEEE International Symposium on Circuits and Systems

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

1991., IEEE International Sympoisum on Circuits and Systems

IEEE International Symposium on Circuits and Systems

Testing of multiple-output domino logic (MODL) CMOS circuits

On detecting single and multiple bridging faults in CMOS circuits using the current supply monitoring method

Testing of zipper CMOS logic circuits

On the equivalence of fanout-point faults

Test generation for hybrid iterative logic arrays

An error corrector/detector implemented in a desktop programmable gate array

Automatic test point selection for linear analog network fault diagnosis

Multiple fault location in linear circuits via multiple excitations

A framework for analog circuit verification

A fast algorithm for the generation of fault dictionary of linear analog circuits using adjoint network approach

Data compressor decompressor IC

VLSI architectures for hierarchical block matching algorithms

Cache memory design for the data transport to array processors

Analog implementation of the Hough transform suitable for single chip VLSI implementation

VLSI recursive motion estimator chip set

The one over eight squared algorithm: a new way for computing convolutions and complex multiplications

A video delay line compiler

VLSI architecture for template matching

ESEU-a hardware architecture for fast image generation

A DCT chip based on a new structured and computationally efficient DCT algorithm

A new method for an efficient optimization of MOS transistor models

A process and geometry driven device macro model for statistical simulation of bipolar ICs

A model for delay evaluation of a CMOS inverter

A new frequency domain physical device simulation technique

A new SPICE-compatible model and related self-consistent parameter extraction for the dual-gate JFET

A modified Hopfield network for two-dimensional module placement

An evolutionary strategy for the global placement of macro cells

A new placement algorithm for custom chip design

A new heuristic for rectilinear Steiner trees

Comparison of mixed analog-digital simulators

A simple short-channel MOSFET model and its application to delay analysis of inverters and series-connected MOSFETs

A one-dimensional MOSFET model for simulation of hot-carrier induced device and circuit degradation

A block placement method based on balloon model

A high speed pipelined CMOS accumulator for implementing numerically controlled oscillators

A new method of realization of digital filters

A congestion-cost-directed router for VLSI switchboxes

A systolic maze-router

Pipelining techniques for IIR digital filters

A new approach to the design of FIR perfect reconstruction QMF banks

An extended 1-D assignment problem: net assignment in gate matrix layout

On the elimination of zero-input limit cycles digital filters)

High performance varible cutoff frequency linear phase filters

A novel IIR filter delay equalizer design approach using a personal computer

A multiple row-based layout generator for CMOS cells

On the design of nearest optimal recursive linear shift-variant digital filters

Quadrature mirror filter design by Chebyshev approximation

Nonlinear monotone networks and their role in the electric power systems

Probabilistic transient stability utilizing a transformation (electric power systems)

On optimizing nMOS and dynamic CMOS functional cells

PASIC: A processor-A/D converter-sensor integrated circuit

A new approach to estimate stability region of interconnected nonlinear systems via the nonlinear comparison principle

Basic property study of power system topological spaces and the mappings on them

Error analysis and digital correction algorithms for pipelined A/D converters

A class of power network reliability problems via colored noise modeling

Design of DAC-drivers for resistive actuators

Sinusoidal responses of nonlinear signal processing operators

The configuration of stack filters by probabilistic search

A linear differential CMOS V*I converter

Theoretical approach of the application of negative dynamic feedback in VCO oscillators

The influence of harmonic distortion on injection locking of synchronous oscillators

A new structure for an analog divider

An algorithm to measure high order Volterra kernels

A precision broadband rectifier in CMOS technology

HBT oscillator and mixer

Unifying the Hopfield and Hamming binary associative memories

High frequency GaAs transconductors and other building blocks for communication

Transfinite resistive networks

Scale invariance and the upper limits of interconnection complexity

A network that uses the outer product rule, hidden neurons, and peaks in the energy landscape

Some Schur stability criterions for uncertain systems with complex coefficients

New artificial neural net models: basic theory and characteristics

Selection filters and commutativity with memoryless nonlinearities

Stack filters and selection probabilities

Lower bounds on the MSE of the single and double loop sigma delta modulators

The neural network self-healing process by using a reconstructed sample space

Algorithm transformations for unlimited parallelism

Toward the use of set-membership identification in efficient training of feedforward neural networks

New results about the symmetric systems with bounded real transfer matrix

On the characterization of positive resistance networks by means of distance geometry

On a solution of the LBR lemma equations for systems with equal number of inputs and outputs

Vertex implications of stability for a class of delay-differential interval system

Discrete signal reconstruction by simulated annealing

Randomly perturbed array processing with optimum integral nulling approach

AMUSE: a new blind identification algorithm

An estimation theoretic approach to the asynchronous detection of PSK signals

Recursive computation of the Fourier transform

The sampling and full reconstruction of band-limited signals at sub-Nyquist rates

Decimation for bandpass sigma-delta analog-to-digital conversion

Rate-optimal scheduling of recursive DSP algorithms based on the scheduling-range chart

A learning rule in the Chebyshev norm for multilayer perceptrons

Winner-take-all networks: Time-based versus activation-based mechanisms for various selection goals

Configuration and performance of modulated filter banks

Robust adaptive array beamforming in two dimensions

Identification of image blur parameters by the method of generalized cross-validation

A study on source coding of super definition images with vector quantization

Application of time-frequency distributions to radar imaging

A high-speed Radon transform and backprojection processor

Decomposition of the focusing transformation in coherent signal-subspace DOA estimation

The fast Hartley transform used in the analysis of electrical transients in power systems

Time-frequency waveform synthesis using a least-squares approach

Two-dimensional adaptive block Kalman filtering of radar imagery

A very fast Kalman filter for image restoration

Maximum unconstrained loadability of power systems

Advances in adaptive orthogonal filtering with applications to source localization

Voltage dynamics of electric power systems in their closed loop operation

The ORD-based least squares lattice algorithm: Some computer simulations using finite wordlengths

Contingency triggered voltage instability in power systems

Lattice and OR decomposition-based algorithms for recursive least squares adaptive nonlinear filters

Analysis of system dynamics after saddle-node bifurcations for general nonlinear systems with unmodelled dynamics

An optimization scheme for locating power system equilibria ranked by a scalar Lyapunov function

Blind adaptive filtering in the frequency domain

Performance comparison of RLS and LMS algorithms for tracking a first order Markov communications channel

Adaptive sinusoid detection using IIR notch filters and multirate techniques

Sample size reduction in stochastic production simulation

Adaptive echo compensation applied to the hands-free telephone problem

High breakdown point estimation in electric power systems

New fast split-type algorithm for adaptive autoregressive spectral analysis

The performance and applications of a new current conveyor integrated circuit

High frequency, precision integrators using current-conveyor compensation techniques

The operational conveyor amplifier-a new circuit design block

Obtaining high precision operation from nonideal neural networks

Some properties of continuous-time and switched capacitor filters based on current charge and voltage simulation

Switched-current system cells

Noise analysis of current copier circuits

Artificial neural network for testing analog circuits

A low-power high-speed 10-bit CMOS-compatible D/A converter

Optimal rectilinear drawing of a graph whose vertices are fixed on a plane

Planar orthogonal drawings of graphs

Electrical circuits optimization using standard network analysers

A neural network model for Chinese speech synthesis

Embedding large meshes into small ones

Linear time optimization of partially solved floorplans

Neural networks for target detection

Maximum k-coverings of weighted transitive graphs with applications

An algorithm for the reconfiguration of I/O buffers

Analog neural networks for real-time constrained optimization

Permutation layout with arbitrary between-pins capacities

Interchanging terminals for improved channel routing

Use of performance sensitivities in routing analog circuits

Silicon retina: image compression by associative neural network based on code and graph theories

On the design of a parallel algorithm for VLSI layout compaction

Technology scaling and performance limitations in delta-sigma analog-digital converters

A new architecture for second order Sigma Delta modulation

Efficient emulation of neural networks on concurrent architectures for optimization problems

Linearization of a sigma-delta modulator by a proper loop delay

Dithering and its effects on sigma delta and multi-stage sigma delta modulation

Transputer based back-propagation neural net emulation system

An improved sigma-delta modulator architecture

Implementation of a fast codebook searching algorithm using a neural-network model

Simulation of Delta - Sigma modulators using behavioral models

A system for the transmission of HDTV signals based on the discrete cosine transform

g-representations and differential equations

HDMAC: European proposal for MAC compatible broadcasting of HDTV signal

New general nonlinear representations for system operators

Time-domain reactive power concepts for nonlinear, nonsinusoidal or nonperiodic networks

HDTV/standard-TV compatible coding based on DCT

Qualitative analysis of neural networks under structural perturbations

Monotonicity in nonlinear resistive circuits

Chaos in mutually coupled phase-locked loops

A globally convergent algorithm for solving a broad class of nonlinear resistive circuits

Latest developments of compatible MUSE systems-ADTV (advanced definition television)

On the linearization of Volterra nonlinear systems using third-order inverses in the digital frequency-domain

Digital bit-rate reduction systems of HDTV

Plastic molded analog isolation amplifier

OASYS: a tool for aiding in design of high performance linear circuits

Can logic simulators handle bidirectionality and charge sharing?

Efficient techniques for timing correction

Mixed-mode simulation of a continuous-time Sigma Delta ADC

Provocative topics on linear integrated circuits

MDCsim-a fast timing simulation program for MOS digital circuits

Orthogonal array approach to gradient based yield optimization

Computer-aided analysis of non-linear lumped-distributed multiport networks

Generation of network functions in symbolic form by using the mixed diagonal node admittance matrix

Characterization of base parasitic resistance in analog bipolar transistors

A new testable design of field programmable logic arrays

Alternative parallel realization for adaptive IIR filters

Systolic implementation of windowed recursive LS estimation

New approach to the state reduction in incompletely specified sequential machines

On the optimal code generation for signal flow graph computation

HALO: an efficient global placement strategy for standard cells

Analogue-digital echo canceller based on the DAFIC building block

XGD: an automatic gate level schematic design system. 1

Efficient management of complex elements in physical IC design

Analog computing method for solving two-point boundary value problems

An adaptive noise canceller and its implementation on a DSP

Layered neural networks applied to the recognition of voiceless unaspirated stops

Unfully interconnected neural networks as associative memory

A novel design technique for tunable notch filters

A modular pipelined implementation of a delayed LMS transversal adaptive filter

VLSI-placement with a neural network model

Nonlinear adaptive filtering using annealed neural networks

An all pole IIR echo canceller

Performance improvements for fine-tuned adaptive recursive filters

A neural network solutions for routing in three stage interconnection networks

Hopfield neural network for AR spectral estimator

A noise-reduction neural network as a preprocessing stage in the SVD based method of harmonic retrieval

Stability, projection, and convergence of SMM for insufficient order adaptive IIR filters

An investigation of high-order bidirectional associative memories: performance, applications, and parallel implementations

Adaptive weighted order statistic filters using back propagation algorithm

Interference cancellation using a Hopfield neural network

Spectral sensitivity and convergence rate in adaptive IIR filtering

Switched-capacitor (SC) simulation of Hopfield type neural networks

A learning scheme for SPICE simulations diagnostics

Stability bounds for an adaptive IIR notch filter

On exponential fitting for circuit simulation

Dynamic circuit restructuring for hierarchical waveform relaxation

An overview of BiCMOS technology and applications

Equivalent analysis of large transistor networks with distributed interconnection circuits

Subspace-based approach for circuit simulation

Process technology for submicron BiCMOS VLSI

ISAID-a methodology for automated analog IC design

Symbolic simulation of harmonic distortion in analog integrated circuits with weak nonlinearities

Adjoint networks revisited

Application of BiCMOS to smart power devices

Analog circuit techniques utilizing BiCMOS technology

Sensitivity analysis of dynamic circuits via adjoint simulation

BiCMOS analog circuit techniques

Digital filter symbolic analysis

Resistorless Bi-CMOS logic circuit

An accurate analytical delay model for BiCMOS driver circuits

A high-speed CMOS full-adder cell using a new circuit design technique-adaptively-biased pseudo-NMOS logic

A 3.6 ns 1 Kb ECL I/O BiCMOS UV EPROM

BiCMOS ASIC for high performance systems

A 5 ns 1 Mb BiCMOS SRAM with ECL I/O interface

Self-timed precharge latch

A novel design of binary majority gate and its application to median filtering

CMOS digital adaptive decision feedback equalizer chip for multilevel QAM digital radio modems

Pulsewidth measurements using an integrated pulse shrinking delay line

Filter banks for analysis-reconstruction systems: a tutorial

A new two-phase pipelined dynamic CMOS ternary logic

Design of multidimensional filter banks for non-separable sampling

Monolithic GaAs programmable parallel-to-serial and serial-to-parallel converters

The superconductive node-pair memory

Efficient 2-D analysis/synthesis filter banks for directional image component representation

The squeezed spiral map: a one-dimensional model of dynamics for a class of third order systems

Analysis of systems subject to parameter uncertainties: application of interval analysis

Realization of filter banks by means of wave digital filters

Investigation of the use of analog design methods for the integration of a high frequency mixed analog digital fiber optic receiver

Viterbi decoder for microwave digital radio-a novel architecture and system simulation results

Asymptotic waveform evaluation for circuits containing floating nodes

Improved operational amplifier settling behaviour using active compensation techniques

Exact equivalence of iterative pre-filtering and IQML

Automatic generation of simulation models for analog filters

Enhanced digital frequency synthesizer and its analysis

The new lossless two-pairs for T-cascade passive digital filters synthesis

Multistage, multirate FIR filter structures for narrow transition-band filters

Synthesis of MIMO system structures with low frequency-weighting sensitivity

Synthesis of digital filters by means of a modified bilinear transformation

A general time domain analysis and design framework for exactly reconstructing FIR analysis/synthesis filter banks

Design of digital filters using simulated annealing

Discrete-time wavelet transforms and their generalizations

Digital all-pass filter design through discrete Hilbert transform

The design of multiplierless two-channel linear-phase FIR filter banks with applications to image subband coding

Polyphase FFT filter bank for QAM data transmission

How to capture all FIR perfect reconstruction QMF banks with unimodular matrices?

Convex projections in image processing

Foundations of cone-beam tomography

'Quantized' hidden Markov models for efficient recognition of cerebral palsy speech

Real-time DSP system for ultrasonic blood flow measurement

Topographic components analysis of evoked potentials: parameter estimation and some preliminary results

A neural network for noninvasive decomposition of surface EMG signals using Gaussian nodes

The simultaneous amplitude and phase approximation problem (linear phase filters)

Arbitrarily tight phase approximation: mathematical feasibility proof

Microwave filters with simultaneous conditions on amplitude and phase

An approach to linear phase approximation that uses time domain constraints

Approximations and synthesis of lumped and distributed filters with arbitrary phase and delay

Logarithmic filter banks

Simulation of quasi-resonant converters in half-wave mode operation by using the modified equations

A novel approach to the analysis and design of the class-E DC-to-DC converter

The infeasibility of constant output power in a constant-current-fed class E power inverter

Microwave characteristics of the MODFET and the velocity-saturated MOSFET wave-equation

General power conversion relation of switching converters

Synthesis of averaged circuit models for switched power converters

DC and AC small signal analysis of zero-current quasi-resonant buck converter

A nonlinear continuous formulation for large-signal analysis of switching DC-DC converters

Determination and minimization of cross regulation in multi-output high order SRC

Photonic neurocomputers and learning machines

Analysis and synthesis of a class of discrete-time neural networks described on hypercubes

Realization of Boolean functions by perceptron algorithm

Consistency and generalization in incrementally trained connectionist networks

Fast computation of optimal paths in two- and higher dimension maps

Immunization of neural networks against hardware faults

Constrained principal component analysis via an orthogonal learning network

A new nonlinear functional analytic framework for modeling artificial neural networks

A neural-network approach to statistical decision making

Block pipeline 2-D IIR filter structures via iteration and retiming

Design and implementation of high-speed signal processing system for 2-D state-space digital filters using distributed arithmetic

VLSI implementation of multiple binomial windows for real-time image processing

A parallel implementation of the self-organizing feature map using synchronous communication

A reconfigurable processor architecture for high-speed multidimensional digital filtering

A high performance image processing system

Image reconstruction from one-bit phase information (OBPI) with specified histogram constraint

Restoration of noisy images blurred by a random point spread function

High speed image processing via SLM/CCD devices

A full plane block Kalman filter for image estimation

PLL based discrete time varying filter for estimation of parameters of a sine signal corrupted by a closely spaced FM interference

Sub-band adaptive IIR noise cancellation

An adaptive IIR echo canceller combining output-error and equation-error criteria

Adaptive cancelling for jammers by exactly nulling

Steady state and convergence characteristics of the fixed point RLS algorithm

Analysis of simplified gradient adaptive lattice algorithms using power-of-two quantization

Transforming SHARF etc. into lattice

Fast adaptive algorithms for multichannel LS filtering

Time scale separation techniques for adaptive filtering

Linear-phase multirate IIR filters

Electronic packaging and interconnection technology: state of the art and future developments

An overview of electrical and mechanical aspects of electronic packaging

Towards mixed analog/digital design automation: a review

Mechanical aspects of second level packaging interconnection methods

Synthesis and layout compilation automation of mixed analog-digital ASICs

The ADAM analog design automation system

Multichip module technology at MCC

An intuitive behavioral modeling language for mixed signal ASIC simulation

Performance-driven evaluation of bipolar analog layouts

Module compilation for analog and mixed analog digital circuits

Modeling of printed circuit cards subject to vibration

Performance driven analog layout compiler

Design methodology for analog VLSI with over 10000 elements

ALE: a layout generating and editing system for analog LSIs

Reliability and fracture of metal-polymer structures with fine-line geometries (packaging)

Experiments using automatic physical design techniques for optimizing circuit performance

A model generation and compilation system for improving electrical performance

An accurate and efficient delay model for CMOS gates in switch-level timing analysis

Electronics packaging/interconnect: the next crisis

Clock skew elimination in CMOS VLSI

Buffer placement in distributed RC-tree networks for minimal Elmore delay

Estimating and optimizing RC interconnect delay during physical design

A novel class of serial-parallel redundant signed-digit multipliers

Timing-driven placement for general cell layout

Cell-based physical design under timing constraints

A fast binary arithmetic implementation of RNS DSP processors

Performance-driven layout of CMOS VLSI circuits

Synthesis for high performance random logic layout

One bit higher order sigma-delta A/D converters

A new signal estimation algorithm for use in Wiener filtering

Analysis of periodic signals via order statistic filters

A first-order current-steering sigma-delta modulator

On a relation between the principle of minimum relative entropy and maximum likelihood estimation

Architectures for high-order multibit Sigma delta modulators

Decimation filters for oversampled analog to digital converters based on quadratic programming

Double sampling in switched-capacitor delta-sigma A/D converters

A monolithic 50 kHz 16-bit A/D-D/A converter using sigma-delta modulation

Sinusoidal and pulse responses of morphological filters

A tutorial discussion of the oversampling method for A/D and D/A conversion

Passivity and no-gain properties establish global convergence of a homotopy method for DC operating points

A parallel algorithm for solving nonlinear networks

All DC solutions of nonlinear circuits

Design of FIR digital filters with very few multipliers and adders

Bifurcations in nonlinear systems-computational issues

An integral equation approach to the periodic steady-state problem in nonlinear circuits

Chaotic behaviour of IMPATT diode oscillators

A novel approach to the exact design of LDI Jaumann digital filters

The perfect structures of periodic sequences in nonautonomous systems

Chaotic phenomena in an autonomous circuit with nonlinear inductor

Chaos from a forced neural-type oscillator

Low bit rate speech coding with glottal linear prediction

The structure of continuous piecewise-linear functions

Numerical integration of partial differential equations by means of multidimensional wave digital filters

A design method for complementary recursive fan filters

Analog signal processing using cellular neural networks

On the design of time-invariant N-path filters

A systolic array for nonlinear adaptive filtering and pattern recognition

Efficient linear phase filters based on switching and time reversal

Parallel processing with a sorting network

Design of configurable processor arrays

Efficient computation of the discrete Wigner-Ville distribution

The synthesis and implementation of signal processing applications specific VLSI CORDIC arrays

Root signals of rank order processors

Cascaded feedforward architectures for parallel Viterbi decoding

Carry-save arithmetic for high-speed digital signal processing

Noise analysis algorithm for periodic time-varying circuits

Nonlinear analog networks for image smoothing and segmentation

Signal flow graph based synthesis of strays-insensitive switched-capacitor filters

2-D and 3-D touching part recognition using the theory of evidence

Motion estimation using interblock correlation

Tracking and enhancement of objects in image sequences using 3-D frequency planar combined DFT/LDE filters

A new switched-capacitor inductance simulation circuit using unity gain buffers

Motion-compensated vector quantization with a dynamic codebook

Classified vector quantization of images using texture analysis

A new synthesis technique for the exact design of switched-capacitor LDI allpass networks

Seismic inversion by the combined use of predictive and semblance techniques

Two dimensional space segmentation recursive filtering algorithm on rectangular processor array

The bilinear-mapping SC differentiators and their applications in the design of biquad and ladder filters

Multi-dimensional to one-dimensional form preserving transformations

Digital compression algorithms for HDTV transmission

Knowledge-based system for coding head and shoulder images

Design of a class of multidimensional recursive digital filters using transformation techniques

Systolic implementations of two-dimensional recursive digital filters

A concurrent solution for large systems of linear equations

New results in multidimensional robust stability

A novel digital multiplier chip based on the neural network

A new 2D quadrature polar separable filter and its applicable to texture analysis

Implementation of a neural net expert system in the presence of don't care and don't know features

Generating multiple analog noise sources from a single linear feedback shift register with neural network applications

Self indexing of neural memories

A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity

Digital neuron model with DPLL for associative memory

Hardware architecture for Kohonen network

Infinite impulse response switched-capacitor interpolators with optimum implementation

A 'neural' A/D converter utilizing Schmitt trigger

Layered neural net design through decision trees

Evaluation and synthesis of ultra narrow band switched-capacitor-filters employing multirate techniques

An adaptive neural network filter for evoked potentials

Exact analysis and sensitivity of nonideal switched capacitor networks through op amp asymptotic modelling

Neural network design using linear programming and relaxation

Design of the fully connected binary neural network via linear programming

Performance optimization of elliptic SC ladder filters using signal-flow graph transformations

Design of neural network systems from custom analog VLSI chips

Comparison between backpropagation and revised GMDH techniques for predicting voltage harmonics

Frequency dependent boundedness property for switched capacitor networks

Efficient DAG synthesis (VLSI logic design)

A switched-capacitor inductance simulation circuit realized with a current conveyor

Singleport/multiport memory synthesis in data path design

Design issues for a switched-capacitor filter using GaAs technology

HiFADiCC: a prototype framework of a highly flexible analog to digital converters silicon compiler

A program for exact synthesis of three-level NAND networks

Adaptive switched capacitor filters based on the LMS algorithm

Five methods for simplification of logic function and comparison of their characteristics

Asynchronous self-timed circuit synthesis with timing constraints

Synthesizing DSP architectures from behavioral specifications: a formal approach

A new multiplier-divider circuit based on switched capacitor data converters

PDL++: an optimizing generator language for register transfer design

Generation of finite state machines from parallel program graphs in DIADES

A new capacitor-ratio-independent algorithmic analog-to-digital converter

Automatic generation of don't cares for the controlling finite state machine from the corresponding behavioral description

Automatic tuning of quality factors for VHF CMOS filters

Harmonic suppression in unbalanced analog MOSFET circuit topologies using body signals

Fully-integrated 5 to 15 MHz programmable bipolar Bessel lowpass filter

Built-in test using perturbed deterministic patterns

Accurate automatic tuning circuit for bipolar integrated filters

An adaptive tuning circuit for integrated continuous-time filters

Impact of OTA nonlinearities on the performance of continuous-time OTA-C bandpass filters

An algorithm to compensate for source spectral impurity in dynamic range measurements (ADCs)

Novel high-frequency continuous-time low-pass OTA based filters

A novel CMOS linear transconductance cell for continuous-time filters

Design considerations for integrated continuous-time video filters

Topological conditions for fault diagnosability at subnetwork-level

Noise analysis of continuous-time active filters

A new approach for the z-domain analysis of linear periodically time-varying discrete time systems

Integrating circuit design and formal verification

Unitary and paraunitary systems in finite fields

On prime factors of nonsingular rational matrices

Discrete algebraic Riccati equations-perturbations and stability of solutions

Timing in systolic systems with variable minimum connection delays

An improved least squares solution technique for multi-processor architecture

A fast constrained optimization algorithm for IC design

Comparison of correlator configurations for FSK demodulation

Simple factorizability of 2-dimensional polynomials

Limit parameters: the general solution of the worst-case problem for the linearized case (IC design)

A new eigenvalue bound for reversible Markov chains with applications to the temperature-asymptotics of simulated annealing

Discrete systems reduction via impulse-response Grammians and its relation to q-Markov covers

Statistical properties of discrete morphological filters

FIR filtering using vector transformation and convolution processor

A new faster and simpler systolic structure for IIR filters

Use of digit-serial computation in systolic arrays

VLSI implementation of wave digital filters using systolic arrays

Time reversed filtering in real-time

Mapping systolic FIR filter banks onto fixed-size linear processor arrays

Data formats and arithmetic operators for serial/parallel trade-offs in pipelined architectures

A systolic structure for complex digital filters

A finite arithmetic implementation of recursive digital filters

FIR digital filters with sigma-delta modulated inputs and their implementation

Parallel dynamic simulation of power systems

Visualizing sparse matrix computations

Harmonic balance and frequency domain relaxation of nonlinear feedback systems

A new relaxation algorithm for power flow analysis

Implementation of the power system weighted least absolute value state estimator using an improved l/sub 1/ linear approximation algorithm

The parallel implementation of the waveform relaxation method for the simulation of structure-preserved power systems

Multiplexing of luminance and chrominance in NTSC compatible extended definition systems based on subsampling

Open architecture television receivers and extensible/intercompatible digital video representations

A multiresolution approach to motion estimation and interpolation with application to coding of digital HDTV

Optimal error estimation and interpolation in frequency constrained image sequences

Time-recursive deinterlacing for IDTV and pyramid coding

Reversible compression of HDTV images using median adaptive prediction and arithmetic coding

Coding of advanced TV for BISDN using multiple subbands

The adaptive line enhancer applied to chirp detection

Adaptive enhancement of seismic data

On reduced computational methods for global IIR filtering

A least-squares pole-zero algorithm in the frequency and Walsh domains with applications to speech representation

Error surfaces of the constant modulus algorithm

A quadratic adaptive recursive filter

A notch filter based frequency-difference detector and its applications

The art of analog circuit design in a digital VLSI world

Design methodology and simulation tools for mixed analog-digital integrated circuits

Behavioral simulation of a 3-bit flash ADC

A very linear BiCMOS transconductor for high-frequency filtering applications

1-M sample/sec 12-bit low-power pipelined A/D converter

Design of an analog/digital truly random number generator

Future of analog in the VLSI environment

The semistate description of a four transistor CMOS Schmitt trigger

Some singular systems applications in circuit theory

A theorem on the effects of compensator poles on feedback system zeros

Zero modules for systems over rings

A unified eigenvalue theory for time-varying linear circuits and systems

On the relationship between external and internal stability of linear time-varying systems

A clustering algorithm for vector valued processes

Approximative threshold-calculation of a PLL-FM-demodulator with bandpass-limiter

A high performance IIR digital filter chip

Improved cellular structures for bit-steered ROM finite ring systolic arrays

Processing elements suitable for the design of high-speed digital signal processing LSI

Parallel architectures for programmable high-speed signal processing devices

An efficient implementation of digital filtering algorithms using a multiprocessor system

Multi signal processor systems for acoustical echo control

Parallel implementations of adaptive multichannel least squares lattice filters

Non-linear pipeline architectures for morphological signal processing

Integrated fast implementation of mathematical morphology operations in image processing

Identification and parameter estimation of nonlinear systems using uniqueness of a basic nonlinear structure

Testing for Gaussianity in nonlinear system identification

Nonlinear dynamical system identification by piecewise-linear system

Singularity structure analysis for nonlinear dynamic systems

An analytical approach to stability analysis of systems with two nonlinear elements

On the stability of operating points in two-transistor circuits

Existence, uniqueness and determination of solution of certain piecewise linear resistive networks

Stability in a class of resistive grid networks containing active device realizations of nonlinear resistors

New stability criteria for the nonuniform sampling digital phase-locked loops

Bounds on solutions of discrete singular systems

Compact template polynomials methodology in pattern recognition and parallel processing

Practical aspects on robust control strategies of a single link flexible manipulator

Real-time regularity detection for robot vision using a customized architectural approach

Modelling signal behavior in DAME: a rule based designer of microprocessor based systems

Scattering parameters and CAD of microwave E-plane double metal filters

A hybrid approach to analyze a complex microwave planar network

Design and realization of transversal microwave bandpass filters

0 degrees -360 degrees wide range digital phase shifters for large array antenna systems

A hybrid model for speech synthesis

Robust voice command in high ambient noise level

High performance algorithms for digital signal processing AGC

Remarks on direction-of-arrival estimation in the presence of unknown noise fields

FFT with reduced coefficient storage requirement

Spatial partition adaptive multiple-interference canceller designs

New algorithms of extrapolation and spectral estimation for discrete band-limited signals based on Fourier transform

Spectral estimation of nonuniformly sampled data using an interpolation technique

Time-frequency estimation from either signal domain-implementation on a RISC system

Hypercomplex numbers in digital signal processing

Relation between the DOA matrix method and the ESPRIT method

On the cross-terms in spectrograms

An iterative approach to the resolution of overlapping echoes of unknown signal shape

Transform coding algorithms for seismic data compression

Parallel solution of sparse linear systems on a vector multiprocessor computer

Tradeoffs in partitioning for waveform relaxation on multicomputers

Permissible line lengths of up to 15 kV lines for microcomputer based selective control of UHV lines; digital simulation and results

A technique for constructing an initial point for solving a system of linear equations by iterative methods

Reciprocative multirelation arrays

Algorithm and architecture for Gray code ordered fast Walsh transform

The modular orientation of VLSI layout

Hyperbolic rotation of subspaces and VLSI algorithms for signal processing and numerical linear algebra

CMOS source-coupled logic for mixed-mode VLSI

Binary tree layouts with adequate I/O support

Yield modeling for fault tolerant WSI arrays

Discrete cosine transform chip for real-time video applications

VLSI system compiler for digital signal processing: modularization and synchronization

A lay-out level comparison of RNS and BNS systolic architectures for complex digital filtering

Via minimization with associated constraints in three-layer routing problem

Dual independent cell generation

Hierarchical floorplanning and detailed global routing with routing-based partitioning

A greedier detailed router

Accurate speed improvement techniques for RC line and tree interconnections in CMOS VLSI

An exact algorithm to minimize mixed-radix exclusive sums of products for incompletely specified Boolean functions

Essential relations between classical and spectral approaches to analysis, synthesis, and testing of completely and incompletely specified Boolean functions

The extended Routh's table in real and complex cases

Parametric yield estimation for a MOSFET integrated circuit

Yet another approach to statistical circuit design-stochastic minimax

Efficient circuit performance modeling using a combination of interpolation and self organizing approximation techniques

A unified approach to the design of canonical integrated ladder filters

A reduction in the number of active components used in transconductance grounded capacitor filters

Some practical problems in OTA-C filters related with parasitic capacitances

Design and optimization of MOSFET-capacitor filters using CMOS current conveyors

Design of a GaAs operational amplifier using a self-backgating MESFET model including deep-level trap effects

FIR filtering using CMOS switched-current techniques

An extended dual transformation approach to current-mode circuit synthesis

A CMOS OTA with improved linearity based on current addition

CMOS switched-current biquadratic filters

VLSI circuits for decomposing binary integers into signed power-of-two terms

Memory design for bit-level VLSI architectures

Realization of extensions to Faddeev algorithm on array of SIMD processors

Architectural design styles in the VLSI implementation of real discrete Fourier transform

Modular architectures for high speed and flexible two-dimensional digital filters

Reed-Solomon codes based novel signature analysis technique for VLSI random access memory testing

Synthesis of optimized ASIC DSP systems

An efficient heuristic approach to state encoding for PLA-based sequential circuits

Maximal solution of linear systems of equations and an application in VLSI

PLA folding by partitioning

Systolic and parallel realization of 2-D IIR digital filters

Design methodologies for the synthesis of high speed multiprocessor digital signal processing systems

An efficient VLSI implementation of real-time Kalman filter

High-speed architectures for algorithms with quantizer loops

SLM/CCD structures for high speed signal processing

The modified Fermat number transform and its application

An enhanced model for software realisation of recursive prime radix discrete Fourier transform

A new convolution structure for the realisation of the discrete cosine transform

Fast algorithms for the special case convolution and deconvolution calculations

Finite series solution for loaded uniform RC lines

Distributed RC-filters with linearized MOS-transistors in CMOS technology

Generalized method of characteristics for time domain simulation of multiconductor lossy transmission lines

An iterative method for transient analysis in nonuniform transmission line

Characterizing optimal topological structures for a class of large distributed data networks

Computation of tasks modeled by directed acyclic graphs on distributed computer systems: allocation without subtask replication

An efficient partitioning algorithm for large-scale circuits

A decomposition approach for parameter identification in large scale networks

Most general characterization of linear N-terminal components for large-scale networks

CMOS realization of a class of Hartline neural pools

CMOS circuit implementations for neuron models

VLSI implementation of cellular neural networks

Synthetic neural systems using current-mode circuits

Optical character recognition: a technology driver for neural networks

Neural network algorithms and implementations

Learning, function approximation and analog VLSI

Mixing analog and digital techniques for silicon neural networks

A new technique for the design of finite precision M-D FIR digital filters

Frequency sampling design of 2-D IIR filters using continued fractions

Design of three-dimensional digital filters based on the outer product expansion

On algorithms for 2-D rational transformations

Design of 2-D recursive digital filters in the spatial domain

On multidimensional FIR filters optimal for luminance/chrominance separation

An analysis of coefficient inaccuracy for 2-D FIR direct form digital filters

A method for the design of a class of 2-D IIR variable cutoff boundary filters

A decomposition-aggregation approach for 2-D systems

Extension of the Toeplitz theorem to the 2-D case and its application to information theory

Analysis and synthesis of neural networks with lower block triangular interconnecting structure

On the existence and design of the best stack filter based associative memory

Bounds on number of hidden neurons of multilayer perceptrons in classification and recognition

A neural computation for canonical representations of nonlinear functions

An all-MOS analog feedforward neural circuit with learning

Hybrid neural network and pattern classification learning algorithms

Motion estimation using a neural network

Adaptive filtering using neural network integrated circuits

Analog VLSI implementation of neural networks

Neural network solutions to a graph theoretic problem

Recent developments in high speed heterojunction devices: a tutorial

Self-aligned contact submicron E/D MODFET IC process: device characteristics and simple circuit applications

InP opto-electronic integrated circuits

AlInAs/GaInAs HEMTs and HBTs for high speed circuits

Heterojunction bipolar transistors for high speed integrated circuits

Signal processing with vertically-integrated resonant tunneling diodes

GaAs IC fabrication with MOSIS-a user's perspective

Synchronous logic synthesis: circuit specifications and optimization algorithms

A set of switch-level synthesis tools

Silicon compilation from register-transfer schematics

ASIC design with OASIS

Verification of high level synthesis designs through gate level simulation of compiled module implementations

Automatic layout synthesis for FIR filters using a silicon compiler

Resource driven synthesis in the HYPER system

PIRAMID: an architecture-driven silicon compiler for complex DSP applications

A parallel switchbox router PARA-CONDOR

Parallel architectures for an iterative image restoration algorithm

Asynchronous implementation of parallel architectures

Mapping of neural networks onto programmable parallel machines

Parallel computation of fan-beam back-projection reconstruction algorithm in computed tomography

A class of multiprocessor architectures for real-time DSP

Matrix permutations of mesh-connected arrays

Parallel arithmetic: from algebra to architecture

Delay-time bounds for on-chip and off-chip interconnection networks

Partitioning logic to optimize routability on graph structures

Performance-oriented decomposition of sequential circuits

Boolean factoring with kernels and rectangle covering

The optimal circuit decompositions using network flow formulations

Automatic precondition verification for high-level design transformations

Implementation of shift-invariant flow graphs on clock-skewed parallel processing system

A Petri net-based algorithm for proofs in Horn clause propositional logic

Reachability of LSFC nets

Extended Petri net models for neural networks and fuzzy inference engines-their net structural properties

Multi-foci fractal-graph networks

Minimal forbidden minor characterization of planar partial 3-trees and application to circuit layout

A method of reliability evaluation for computer-communication networks

Resource allocation and code generation for pointer based pipelined DSP multiprocessors

Performance analysis of asynchronous hierarchical-bus multiprocessor systems using closed queuing network models

Scattering parameters for the simulation of transmission-line networks

Bezier formulation of multistep algorithms

A study of faulty signature for diagnostics

Defect analysis, test generation and fault simulation for gate oxide shorts in CMOS ICs

A critical hazard detection scheme for semi-custom VLSI

IC spot-defect and fault semantics-a unified framework

Bridging the gap between design and testing of analog integrated circuits

A top-down built-in self-test design in VLSI testing

A testing methodology for large scale hybrid VLSI

Constant testability for single fault detection in two-dimensional systolic array structures for matrix multiplication

Easily testable DCVS multiplier

An efficient algorithm for constructing systolic arrays from VLSI/WSI containing faulty elements

Restructure algorithm for testable PLA

Fault tolerant memory designs for improved yield and reliability

Design of robust-fault-tolerant arithmetic circuits and their application

A new design to prevent fault equivalence in PLAs

DSC-a space compression method

Model selection by cross-validation

A polynomial approximation filter design technique

All-pass group delay equalization using S-plane poles with equal frequency spacing

Computation of large-change sensitivity of cascade networks

Broad-band impedance matching of the RLC generator and load

A new scheme of implementing N-port circulator with summers

Digital phase-locked loop constructed by AND-filter

Compensation of sample-and-hold distortion through zero insertion

Design of a 20 bit sigma-delta A/D-converter for audio applications

A new improved iterative method for compensation of the (sin x)/x frequency response distortion

High speed A/D conversion using QMF banks

A CMOS class-AB transconductance amplifier for switched-capacitor applications

Second generation switched-current signal processing

Switched-capacitor artificial neural networks for nonlinear optimization with constraints

Finite gain compensation techniques for high-Q bandpass SC filters

Automatic synthesis of CMOS operational amplifiers for a switched capacitor compiler

Effective clock-feedthrough reduction in switched capacitor circuits

Design and testing of a GaAs switched capacitor filter

Offset-compensated switched-capacitor integrators

Switched capacitor and active-RC allpass ladder filters

Programmable SC neural networks for solving nonlinear programming problems

A necessary and sufficient condition for any tree of a connected graph to be a DFS-tree of one of its 2-isomorphic graphs

Floorplanning by graph dualization: L-shaped modules

A consideration on a sliding palette problem in a two-dimensional automatic warehouse

An algorithm to detect positive cycles in a constraint graph for layout compaction

Generation of rectangular duals of a planar triangulated graph by elementary transformations

An approach to robust network construction from graph augmentation problems

Approximation algorithms for VLSI partition problems

A neighborhood improvement algorithm for rectilinear Steiner trees

A new efficient approximation algorithm for the Steiner tree problem in rectilinear graphs

Two-way graph partitioning by principal components

A programming and code generation environment for non-homogeneous DSP multiprocessors

Efficient analog-to-residue conversion schemes

High speed data modem implementation using the TMS320C25

Design and implementation of a high speed residue number system correlator for ultrasonic time domain blood flow measurement

A speech processing LSI for ATM network subscriber circuits

Automatic signal processor code generation: matrix reduction based module optimization

Real-time parallel processor for on-board airborne synthetic aperture radar (SAR)

A fast RNS Galois field multiplier

A family of all essential Radix-2 addition/subtraction multi-polarity transforms: algorithms and interpretations in Boolean domain

A new PLL-FM modulator with rapid acquisition time

On-line security classification using an artificial neural network

An improved Hopfield model for power system contingency classification

Real-time security monitoring of electric power systems using parallel associative memories

Potential of artificial neural networks in power system operation

Determination of power system topological observability using the Boltzmann machine

Conceptual approach to the application of neural network for short-term load forecasting

A constrained optimization neural net technique for economic power dispatch

Design of multi-layer neural networks with powers-of-two weights

RNS neural networks

A neural-like feed-forward ADC

Coarse-grained processor array implementing the multilayer neural network model

A hierarchical neural network for temporal pattern recognition

CMOS current-mode circuits for neural networks

A wide-dynamic-range programmable synapse for impulse neural networks

Design of modifiable-weight synapse CMOS analog cell

Capacitive synapses for microelectronic neural networks

Active analog memories for neuro-computing

A new stability test theorem of 2-dimensional recursive digital filters and it's application

General results concerning the BIBO stability of inverse 2-D digital filters

Periodic and nonperiodic modes in two-dimensional digital filters

On nonessential singularities of the second kind in T/sup 2/U for 3-D digital filters

On the stability of N-dimensional (N-D) digital filters in the presence of nonessential singularity of the second kind (NSSK)

Threshold of stability and test procedure for 2-D scattering Hurwitz polynomials

Asymptotic behavior of nonlinear m-D digital filters with singularities on the distinguished boundary

A structure for the elimination of two-dimensional limit cycle oscillations

2-D lattice structure and explicit formulas for the design of 2-D digital fan filters

Hardware design of 2-D analog filters for directly filtering raster scanned images in real time

Architecture and floorplan design techniques for video-rate FIR filters

VLSI implementation of an entropy coder and decoder for advanced TV applications

A codebook, distribution and comparator (CDC) chip architecture for real-time image coding

ASIC image sensors

On VLSI implementation of median based field rate up-conversion

A real time pipeline interleaving approach for image/video signal processing

A 65 MHz 16-tap FIR filter chip with on-chip video delay lines

A 100 MHz 40-tap programmable FIR filter chip

Performance evaluation of the VQ based image coding algorithm

GaAs analog integrated circuits and their potential system insertions

The potential of p-well GaAs MESFET technology for precision integrated circuits

Continuous heterostructure field effect transistor model

Coplanar Schottky waveguides for microwave phase shifting, attenuation and harmonic generation

A 2.5 GHz GaAs sample and hold

A high-frequency GaAs transductance circuit and its applications

Integrated GaAs microsensors

The advent of the signal microprocessor

Integrated GaAs readout multiplexer and preprocessing electronics for infrared sensors

Synthesis for testability: a brief survey

Issues in logic synthesis for delay and bridging faults

Synthesis of combinational logic circuits for path delay fault testability

Validatable nonrobust delay-fault testable circuits via logic synthesis

Synthesis of testable finite state machines

Multiple fault testable sequential circuits

Adaptive nonlinear state-space filters

Vector quantization with adaptive sampling (VQAS)

Optimum DSP multiprocessor architecture for efficient execution of the fast transversal filter

Adaptive forward-backward filtering of images

An adaptive system identification method on bispectrum

Dynamic range of finite-precision recursive QRD LS algorithm and its stability

Identification with non-parametric uncertainty

Modification of the least-mean-square equation error algorithm for IIR system identification and adaptive filtering

An optimized automatic gain controller for real time recursive LMS adaptive filters

Adaptive notch wave digital filters

Steady-state analysis of adaptive notch filter for detection of multiple sinusoids

Joint gradient-based time delay estimation and adaptive filtering

A method of tap clustering in an adaptive filter for video ghost cancellation

A novel adaptive Kalman filtering algorithm

Digitally-programmable switched-current filters

Base resistance and pn junction capacitance extraction on vertical bipolar transistors

Current-feedthrough effects and cancellation techniques in switched-current circuits

Very high frequency CMOS OTA-C quadrature oscillators

Realization of current-mode complex pole all-pass networks using a single current conveyor

Automated generation of analog schematic diagrams

Noise optimization of BiCMOS operational amplifiers

Folded-cascode CMOS operational amplifier with slew rate enhancement circuit

Macromodel of a current-feedback amplifier

Three-input amplifiers

On the design of fully integrated charge preamplifiers for the Superconducting Supercollider

High-frequency broadband amplifier ASIC design optimization using pole-zero compensation techniques

Higher order diffusion model for a bipolar transistor

Design of a minimum drift characteristic for differential MOSFET amplifier

Logical function and delay time extraction from MOS circuit data

Current mode circuits: analysis and CAD modelling

Nonlinear principal component using feedforward neural network

A new feature extraction method by neural networks

MDPCM picture coding

Classification boundaries and gradients of trained multilayer perceptrons

Generation of digital transfer functions of the FIR type approximating z/sup -p/q/

Parallel algorithms prototyping: a case study

Design of stable high order 1-bit sigma-delta modulators

Properties and structures of linear-phase FIR filters based on switching and resetting of IIR filters

Multiplier-free decimator algorithms for superresolution oversampled converters

An oversampled sigma-delta A/D converter circuit using two-stage fourth order modulator

Current-mode neural network building blocks for analog MOS VLSI

A new algorithm for model reduction by impulse/step error minimisation

1990 IEEE International Symposium on Circuits and Systems (Cat. No.90CH2868-8)

A general description of common-mode feedback in fully-differential amplifiers

Design of FIR sampled-data filters for data transmission

IEEE International Symposium on Circuits and Systems,

1988., IEEE International Symposium on Circuits and Systems

Transputer based back-propagation neural net emulation system

Content Provider	IEEE Xplore Digital Library
Author	Jou, I.-C. Yung-Chang Tsai
Copyright Year	1990
Description	Author affiliation: Minist. of Commun., Chung-Li, Taiwan (Jou, I.-C.)
Abstract	A transputer based back-propagation neural net emulation system is presented. The authors propose one mapping approach for mesh architecture. The major challenge of this research work is to map the back-propagation neural net model onto transputer arrays for mesh architecture. The OCCAM parallel programming language is used for programming the operations of these transputers. Using this transputer based emulation system, a test case for Mandarin (Chinese voice) speech zero to nine recognition is implemented, and encouraging results, i.e. the recognition rate of inside test 99% and outside test 96%, have been obtained.<>
Starting Page	1879
Ending Page	1882
File Size	352977
Page Count	4
File Format	PDF
DOI	10.1109/ISCAS.1990.112044
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-05-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Neural networks Emulation Neurons System testing Speech recognition Artificial neural networks Parallel programming Switches Natural languages Parallel processing
Content Type	Text
Resource Type	Article

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