NDLI: Energy-efficient and parameterized designs for fast Fourier transform on FPGAs

Content Provider	IEEE Xplore Digital Library
Author	Seonil Choi Govindu, G. Ju-Wook Jang Prasanna, V.K.
Copyright Year	2003
Description	Author affiliation: Univ. of Southern California, Los Angeles, CA, USA (Seonil Choi; Govindu, G.)
Abstract	We develop energy efficient designs for the fast Fourier transform (FFT) on FPGAs. Architectures for FFT on FPGAs are designed by investigating and applying techniques for minimizing the energy dissipation. Architectural parameters such as degrees of vertical and horizontal parallelism are identified and a design domain is created through a combination of design choices. We determine design trade-offs using high-level performance estimation to obtain energy-efficient designs. We implemented a set of parametrized designs having parallelism, radix and choice of storage types as parameters, on Xilinx Virtex-II FPGA to verify the estimates. Our designs dissipate 57% to 78% less energy than the optimized designs from the Xilinx library. In terms of a comprehensive metric such as EAT (energy-area-time), our designs offer performance improvements of 3/spl times/ to 13/spl times/ over the Xilinx designs.
Sponsorship	IEEE Signal Process, Soc
File Size	344961
File Format	PDF
ISBN	0780376633
ISSN	15206149
DOI	10.1109/ICASSP.2003.1202418
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-04-06
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy efficiency Fast Fourier transforms Field programmable gate arrays Energy dissipation Computer architecture Parallel processing Libraries Application software Delay Design engineering
Content Type	Text
Resource Type	Article

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