NDLI: Characterization of Edge Fringing Effect on the <formula formulatype=inline><tex Notation=TeX>$C$ </tex></formula>–<formula formulatype=inline><tex Notation=TeX>$V$</tex></formula> Responses From Depletion to Deep Depletion of MOS(p) Capacitors With Ultrathin Oxide and High-<formula formulatype=inline><tex Notation=TeX>$kappa$</tex> </formula> Dielectric

Content Provider	IEEE Xplore Digital Library
Author	Jen-Yuan Cheng Jenn-Gwo Hwu
Copyright Year	1963
Abstract	The edge fringing effect (EFE) on the capacitance-voltage (C -V) responses from depletion to deep depletion (DD) of p-substrate metal-oxide-semiconductor capacitors with ultrathin oxide (2.1-2.9 nm) and high-κ dielectric was examined. It was found that the EFE plays a significant role on the initiation voltage of DD in the C -V curve. The shape of capacitance in DD has been characterized in detail via a modified quantum-mechanical-based EFE model with the consideration of edge direct tunneling current conduction concept. Excellent agreement between the model and the experimental data for gate oxide has been achieved. To elucidate the enhanced fringing effect at edge, the effective surface field ratio between edge and bulk was adopted to clarify the role of injected carriers with the EFE mechanism. It was found that the extracted ratio increases with the oxide thickness and the initiation voltage of DD accordingly.
Sponsorship	IEEE Electron Devices Society
Starting Page	565
Ending Page	572
Page Count	8
File Size	900585
File Format	PDF
ISSN	00189383
Volume Number	59
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Tunneling Capacitance Logic gates Hafnium compounds Capacitors Silicon Rapid thermal annealing metal–oxide–semiconductor (MOS) Capacitance–voltage ($C$– $V$) deep depletion (DD) edge fringing effect (EFE) electrical local thinning (ELT)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Photo-Sensitivity Enhancement of ${rm HfO}_{2}$-Based MOS Photodiode With Specific Perimeter Dependency Due to Edge Fringing Field Effect

Germanium MOS capacitors incorporating ultrathin high-/spl kappa/ gate dielectric

Si interlayer passivation on germanium MOS capacitors with high-/spl kappa/ dielectric and metal gate

Impact of Semiconductor and Interface-State Capacitance on Metal/High-k/GaAs Capacitance–Voltage Characteristics

Two-frequency C-V correction using five-element circuit model for high-k gate dielectric and ultrathin oxide

Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric

Enhancement of Temperature Sensitivity for Metal–Oxide–Semiconductor (MOS) Tunneling Temperature Sensors by Utilizing Hafnium Oxide $(hbox{HfO}_{2})$ Film Added on Silicon Dioxide $(hbox{SiO}_{2})$

Characterization of Inversion Tunneling Current Saturation Behavior for MOS(p) Capacitors With Ultrathin Oxides and High-$k$ Dielectrics

A Fast Technique to Screen Carrier Generation Lifetime Using DLTS on MOS Capacitors

Characterization of Edge Fringing Effect on the $C$ –$V$ Responses From Depletion to Deep Depletion of MOS(p) Capacitors With Ultrathin Oxide and High-$kappa$ Dielectric

Similar Documents

Photo-Sensitivity Enhancement of ${rm HfO}_{2}$-Based MOS Photodiode With Specific Perimeter Dependency Due to Edge Fringing Field Effect

Germanium MOS capacitors incorporating ultrathin high-/spl kappa/ gate dielectric

Si interlayer passivation on germanium MOS capacitors with high-/spl kappa/ dielectric and metal gate

Impact of Semiconductor and Interface-State Capacitance on Metal/High-k/GaAs Capacitance–Voltage Characteristics

Two-frequency C-V correction using five-element circuit model for high-k gate dielectric and ultrathin oxide

Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric

Enhancement of Temperature Sensitivity for Metal–Oxide–Semiconductor (MOS) Tunneling Temperature Sensors by Utilizing Hafnium Oxide $(hbox{HfO}_{2})$ Film Added on Silicon Dioxide $(hbox{SiO}_{2})$

Characterization of Inversion Tunneling Current Saturation Behavior for MOS(p) Capacitors With Ultrathin Oxides and High-$k$ Dielectrics

A Fast Technique to Screen Carrier Generation Lifetime Using DLTS on MOS Capacitors

Characterization of Edge Fringing Effect on the $C$ –$V$ Responses From Depletion to Deep Depletion of MOS(p) Capacitors With Ultrathin Oxide and High-$kappa$ Dielectric