NDLI: Failure Modes and Hardness Assurance for Linear Integrated Circuits in Space Applications

Content Provider	IEEE Xplore Digital Library
Author	Johnston, A.H. Rax, B.G.
Copyright Year	1963
Abstract	Failure modes are investigated for linear integrated circuits, including op-amps that are embedded within more complex circuit functions. The specific techniques used in internal circuit design have a large impact on the radiation sensitivity of various device parameters, which makes it difficult to generalize conclusions about failure mechanisms. Loading and bias conditions can be critically important for some devices, and have a large impact on hardness assurance.
Sponsorship	IEEE Nuclear and Plasma Sciences Society Computer Applications in Nuclear and Plasma Sciences (CANPS) Lawrence Berkeley Lab. Lawrence Livermore Nat. Lab. APS College of William and Mary Continuous Electron Beam Accelerator Facility NASA Defence Nuclear Agency Sandia National Laboratories Jet Propulsion Laboratory Brookhaven Nat. Lab. Lawrence Livermore Nat. Lab IEEE/NPPS Radiat. Effects Committee Defence Nuclear Agency/DoD Sandia National Laboratories/DOE Jet Propulsion Laboratory/NASA Phillips Lab./DoD
Starting Page	1966
Ending Page	1972
Page Count	7
File Size	179268
File Format	PDF
ISSN	00189499
Volume Number	57
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Analog integrated circuits Circuit testing Operational amplifiers Linear circuits Degradation Circuit synthesis Propulsion Space technology Application specific integrated circuits Failure analysis total dose damage Hardness assurance linear circuits
Content Type	Text
Resource Type	Article
Subject	Nuclear and High Energy Physics Electrical and Electronic Engineering Nuclear Energy and Engineering

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