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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Fujimori, I. Nogi, A. Sugimoto, T. |
| Copyright Year | 1966 |
| Abstract | A 24-bit 192-kHz sample-rate digital-to-analog converter (DAC) achieves 120-dB A-weighted dynamic range in the 20-kHz band, and consumes 310 mW with a 5-V power supply. A third-order five-bit /spl Delta//spl Sigma/ architecture optimized for high-end consumer audio has been developed and used. A switched-capacitor (SC) DAC combined with infinite-impulse response (IIR) and finite-impulse response (FIR) filters is employed to increase immunity to clock jitter, and reduce analog power. Partial-range dynamic element matching (DEM) enhances mismatch shaping with reduced circuit overhead. The 7.8-mm/sup 2/ chip fabricated in 0.5-/spl mu/ m CMOS integrates a stereo DAC and all functions required for DVD-audio playback. |
| Sponsorship | IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE |
| Starting Page | 1066 |
| Ending Page | 1073 |
| Page Count | 8 |
| File Size | 329995 |
| File Format | |
| ISSN | 00189200 |
| Volume Number | 35 |
| Issue Number | 8 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-08-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Dynamic range Quantization Clocks Jitter Circuits Semiconductor device noise Digital-analog conversion Digital modulation Power supplies Finite impulse response filter |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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