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| Content Provider | ACM Digital Library |
|---|---|
| Author | Wang, Yanzhi Pedram, Massoud Ramadurgam, Srikanth Bogdan, Paul Xue, Yuankun Shafaei Bejestan, Alireza |
| Abstract | The impact of dark silicon phenomenon on multicore processors under deeply-scaled FinFET technologies is investigated in this paper. To do this accurately, a cross-layer framework, spanning device, circuit, and architecture levels is initially introduced. Using this framework, leakage and dynamic power consumptions as well as frequency levels of in-order and out-of-order (OoO) processor cores, and on-chip cache memories and routers in a network-on-chip-based chip multiprocessor system synthesized in 7nm FinFET technology and operating in both super- and near-threshold voltage regimes are presented. Subsequently, total power consumptions of multicore chips manufactured with (i) OoO and (ii) in-order processor cores are reported and compared. According to our results, for a 64-core chip and 15W thermal design power budget, 64% and 39% dark silicon are observed in OoO and in-order multicores, respectively, under super-threshold regime. These percentages drop to 19% and 0% for OoO and in-order multicores operating in the near-threshold regime, respectively. Furthermore, the highest energy efficiencies are achieved by operating in the near-threshold regime, which points to the effectiveness of near-threshold computing in mitigating the effect of dark silicon phenomenon under deeply-scaled technologies. |
| Starting Page | 127 |
| Ending Page | 132 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781450334747 |
| DOI | 10.1145/2742060.2742096 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2015-05-20 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Finfet devices Near-threshold computing Dark silicon |
| Content Type | Text |
| Resource Type | Article |
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