NDLI: Simultaneous impulse stimulation and response sampling technique for built-in self test of linear analog integrated circuits

Content Provider	ACM Digital Library
Author	San-Um, Wimol Masayoshi, Tachibana
Abstract	This paper proposes a new impulse stimulation and response sampling technique for the implementation of a Built-In Self Test of linear analog integrated circuits embedded in mixed-signal systems. The testing technique is the monitoring of physical fault influences on impulse response characteristics through the use of single-point sampling method and window criterions. The implementation of BIST system realizes a controllable impulse generator, which provide two short impulses simultaneously for stimulating a Circuit-Under-Test, and sampling a transient impulse response. This proposed technique is cost-effective and relatively compact. Neither high-precision analog test stimuli with fault-free bit streams nor characterization and synchronization processes in DSP are required. Demonstrations of the BIST system for a Sallen-Key low-pass filter in a physical level using 0.18-μm CMOS technology show a low area overhead of 11.19%, and offer high catastrophic and parameter fault coverage of 98.24%.
Starting Page	1
Ending Page	6
Page Count	6
File Format	PDF
ISBN	9781605587059
DOI	10.1145/1601896.1601924
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2009-08-31
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Impulse stimulation Linear analog integrated circuits Built-in self test Response sampling technique
Content Type	Text
Resource Type	Article

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Simultaneous impulse stimulation and response sampling technique for built-in self test of linear analog integrated circuits