NDLI: Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router

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Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router

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Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router

Content Provider	ACM Digital Library
Author	Susin, Altamiro Kastensmidt, Fernanda Kreutz, Marcio Matos, Debora Carro, Luigi Concatto, Caroline Cota, Erika
Abstract	As the complexity of designs increase and technologies scale down, devices are subject to new types of malfunctions and failures. Network-on-chip routers are responsible to ensure the proper communication of on-chip cores, and the buffers present in the router channels are crucial to ensure the communication performance. However, faults can affect the routers services, thus compromising the communication integrity and the whole operation of the system. This work proposes the simultaneous use of Reconfiguration, Hamming Code and Triple Modular Redundancy (TMR) to ensure fault tolerance in the FIFOs and links of the network-on-chips (NoCs). The proposed router can dynamically stop using faulty buffers and, to sustain performance, borrow other buffer units from its neighbor channels whenever necessary. The Hamming Code protects the data in the links against a fault in a wire, while TMR is used to protect the control of the FIFO. The new router increases the reliability in 63% and shows low latency and power when compared to the original router. The HW overhead is 77% more gates, used to improve the yield and the system lifetime in comparison to the usage of the reconfigurable router just for performance increase in the NoC.
Starting Page	1
Ending Page	6
Page Count	6
File Format	PDF
ISBN	9781605587059
DOI	10.1145/1601896.1601929
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2009-08-31
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Fault tolerance Noc Reconfigurable router Network-on-chip Reliability
Content Type	Text
Resource Type	Article

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