NDLI: A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures

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A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures

Content Provider	ACM Digital Library
Author	Fidalgo, André V. Gericota, Manuel G. Alves, Gustavo R. Martins Ferreira, Jose M.
Abstract	On-chip debug (OCD) features are frequently available in modern microprocessors. Their contribution to shorten the time-to-market justifies the industry investment in this area, where a number of competing or complementary proposals are available or under development, e.g. NEXUS, CJTAG, IJTAG. The controllability and observability features provided by OCD infrastructures provide a valuable toolbox that can be used well beyond the debugging arena, improving the return on investment rate by diluting its cost across a wider spectrum of application areas. This paper discusses the use of OCD features for validating fault tolerant architectures, and in particular the efficiency of various fault injection methods provided by enhanced OCD infrastructures. The reference data for our comparative study was captured on a workbench comprising the 32-bit Freescale MPC-565 microprocessor, an iSYSTEM IC3000 debugger (iTracePro version) and the Winidea 2005 debugging package. All enhanced OCD infrastructures were implemented in VHDL and the results were obtained by simulation within the same fault injection environment. The focus of this paper is on the comparative analysis of the experimental results obtained for various OCD configurations and debugging scenarios.
Starting Page	22
Ending Page	27
Page Count	6
File Format	PDF
ISBN	9781605582313
DOI	10.1145/1404371.1404388
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2008-09-01
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Real time systems Dependability Fault injection
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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