NDLI: CoScale: Coordinating CPU and Memory System DVFS in Server Systems

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CoScale: Coordinating CPU and Memory System DVFS in Server Systems

Content Provider	ACM Digital Library
Author	Wenisch, Thomas F. Bhattacharjee, Abhishek Meisner, David Deng, Qingyuan Bianchini, Ricardo
Abstract	Recent work has introduced memory system dynamic voltage and frequency scaling (DVFS), and has suggested that balanced scaling of both CPU and the memory system is the most promising approach for conserving energy in server systems. In this paper, we first demonstrate that CPU and memory system DVFS often conflict when performed independently by separate controllers. In response, we propose Co Scale, the first method for effectively coordinating these mechanisms under performance constraints. Co Scale relies on execution profiling of each core via (existing and new) performance counters, and models of core and memory performance and power consumption. Co Scale explores the set of possible frequency settings in such a way that it efficiently minimizes the full-system energy consumption within the performance bound. Our results demonstrate that, by effectively coordinating CPU and memory power management, Co Scale conserves a significant amount of system energy compared to existing approaches, while consistently remaining within the prescribed performance bounds. The results also show that Co Scale conserves almost as much system energy as an offline, idealized approach.
Starting Page	143
Ending Page	154
Page Count	12
File Format	PDF
ISBN	9780769549248
ISSN	10724451
DOI	10.1109/MICRO.2012.22
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2012-12-01
Access Restriction	Subscribed
Subject Keyword	Energy conservation dynamic voltage and frequency scaling coordination
Content Type	Text
Resource Type	Article

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