NDLI: Exploiting Value Locality in Physical Register Files

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Exploiting Value Locality in Physical Register Files

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Exploiting Value Locality in Physical Register Files

Content Provider	ACM Digital Library
Author	Sohi, Gurindar S. Balakrishnan, Saisanthosh
Abstract	The physical register file is an important component of adynamically-scheduled processor. Increasing the amount of parallelismplaces increasing demands on the physical register file,calling for alternative file organization and management strategies.This paper considers the use of value locality to optimize theoperation of physical register files.We present empirical data showing that: (i) the value producedby an instruction is often the same as a value produced by anotherrecently executed instruction, resulting in multiple physical registerscontaining the same value, and (ii) the values 0 and 1 accountfor a considerable fraction of the values written to and read fromphysical registers. The paper then presents three schemes to exploitthe above observations.The first scheme extends a previously-proposed scheme to useonly a single physical register for each unique value. The secondscheme is a special case for the values 0 and 1. By restricting optimizationto these values, the second scheme eliminates many of thedrawbacks of the first scheme. The third scheme further improveson the second, resulting in an optimization that reduces physicalregister requirements with simple micro-architectural extensions.A performance evaluation of the three schemes is also presented.
File Format	PDF
ISBN	076952043X
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2003-12-03
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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