NDLI: A defect-tolerant accelerator for emerging high-performance applications

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Volume 40, Issue 5, December 2012

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Volume 40, Issue 3, June 2012

Simultaneous branch and warp interweaving for sustained GPU performance

Branch regulation

Tolerating process variations in nanophotonic on-chip networks

Scheduling heterogeneous multi-cores through Performance Impact Estimation (PIE)

Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures

Reducing memory reference energy with opportunistic virtual caching

Setting an error detection infrastructure with low cost acoustic wave detectors

A case for exploiting subarray-level parallelism (SALP) in DRAM

Physically addressed queueing (PAQ)

Can traditional programming bridge the Ninja performance gap for parallel computing applications?

Configurable fine-grain protection for multicore processor virtualization

Managing distributed ups energy for effective power capping in data centers

End-to-end sequential consistency

Side-channel vulnerability factor

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The yin and yang of power and performance for asymmetric hardware and managed software

A first-order mechanistic model for architectural vulnerability factor

Improving writeback efficiency with decoupled last-write prediction

Staged memory scheduling

Revisiting hardware-assisted page walks for virtualized systems

Scale-out processors

Enhancing effective throughput for transmission line-based bus

A defect-tolerant accelerator for emerging high-performance applications

Buffer-on-board memory systems

Probabilistic shared cache management (PriSM)

The dynamic granularity memory system

Towards energy-proportional datacenter memory with mobile DRAM

Boosting mobile GPU performance with a decoupled access/execute fragment processor

Inspection resistant memory

A case for random shortcut topologies for HPC interconnects

Volume 40, Issue 2, May 2012

Volume 40, Issue 1, March 2012

A defect-tolerant accelerator for emerging high-performance applications

Content Provider	ACM Digital Library
Author	Temam, Olivier
Abstract	Due to the evolution of technology constraints, especially energy constraints which may lead to heterogeneous multi-cores, and the increasing number of defects, the design of defect-tolerant accelerators for heterogeneous multi-cores may become a major micro-architecture research issue. Most custom circuits are highly defect sensitive, a single transistor can wreck such circuits. On the contrary, artificial neural networks (ANNs) are inherently error tolerant algorithms. And the emergence of high-performance applications implementing recognition and mining tasks, for which competitive ANN-based algorithms exist, drastically expands the potential application scope of a hardware ANN accelerator. However, while the error tolerance of ANN algorithms is well documented, there are few in-depth attempts at demonstrating that an actual hardware ANN would be tolerant to faulty transistors. Most fault models are abstract and cannot demonstrate that the error tolerance of ANN algorithms can be translated into the defect tolerance of hardware ANN accelerators. In this article, we introduce a hardware ANN geared towards defect tolerance and energy efficiency, by spatially expanding the ANN. In order to precisely assess the defect tolerance capability of this hardware ANN, we introduce defects at the level of transistors, and then assess the impact of such defects on the hardware ANN functional behavior. We empirically show that the conceptual error tolerance of neural networks does translate into the defect tolerance of hardware neural networks, paving the way for their introduction in heterogeneous multi-cores as intrinsically defect-tolerant and energy-efficient accelerators.
Starting Page	356
Ending Page	367
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/2366231.2337200
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	40
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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