NDLI: Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors

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Volume 26, Issue 5, Dec. 1998

Volume 26, Issue 4, September 1998

Volume 26, Issue 3, June 1998

Memory system characterization of commercial workloads

Performance characterization of a Quad Pentium Pro SMP using OLTP workloads

Execution characteristics of desktop applications on Windows NT

An analysis of database workload performance on simultaneous multithreaded processors

An analysis of correlation and predictability

Branch prediction based on universal data compression algorithms

Modeling program predictability

Multi-level texture caching for 3D graphics hardware

Declustered disk array architectures with optimal and near-optimal parallelism

Confidence estimation for speculation control

Pipeline gating

Memory dependence prediction using store sets

Dynamic history-length fitting

Accurate indirect branch prediction

Using prediction to accelerate coherence protocols

Increasing TLB reach using superpages backed by shadow memory

Options for dynamic address translation in COMAs

Integrated predicated and speculative execution in the IMPACT EPIC architecture

Threaded multiple path execution

Selective eager execution on the PolyPath architecture

Improving trace cache effectiveness with branch promotion and trace packing

The effect of instruction fetch bandwidth on value prediction

Dynamic IPC/clock rate optimization

Performance modeling and code partitioning for the DS architecture

Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor

Effects of architectural and technological advances on the HP/Convex Exemplar's memory and communication performance

Design choices in the SHRIMP system

Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors

Exploiting spatial locality in data caches using spatial footprints

Low load latency through sum-addressed memory (SAM)

Analytic evaluation of shared-memory systems with ILP processors

Volume 26, Issue 2, May 1998

Volume 26, Issue 1, March 1998

Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors

Content Provider	ACM Digital Library
Author	Hennessy, John Verghese, Ben Heinrich, Mark Gharachorloo, Kourosh Soundararajan, Vijayaraghavan Gupta, Anoop
Abstract	Given the limitations of bus-based multiprocessors, CC-NUMA is the scalable architecture of choice for shared-memory machines. The most important characteristic of the CC-NUMA architecture is that the latency to access data on a remote node is considerably larger than the latency to access local memory. On such machines, good data locality can reduce memory stall time and is therefore a critical factor in application performance.In this paper we study the various options available to system designers to transparently decrease the fraction of data misses serviced remotely. This work is done in the context of the Stanford FLASH multiprocessor. FLASH is unique in that each node has a single pool of DRAM that can be used in a variety of ways by the programmable memory controller. We use the programmability of FLASH to explore different options for cache-coherence and data-locality in compute-server workloads. First, we consider two protocols for providing base cache-coherence, one with centralized directory information (dynamic pointer allocation) and another with distributed directory information (SCI). While several commercial systems are based on SCI, we find that a centralized scheme has superior performance. Next, we consider different hardware and software techniques that use some or all of the local memory in a node to improve data locality. Finally, we propose a hybrid scheme that combines hardware and software techniques. These schemes work on the same base platform with both user and kernel references from the workloads. The paper thus offers a realistic and fair comparison of replication/migration techniques that has not previously been feasible.
Starting Page	342
Ending Page	355
Page Count	14
File Format	PDF
ISSN	01635964
DOI	10.1145/279361.279403
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	26
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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