NDLI: Performance characterization of a Quad Pentium Pro SMP using OLTP workloads

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Volume 26, Issue 5, Dec. 1998

Volume 26, Issue 4, September 1998

Volume 26, Issue 3, June 1998

Memory system characterization of commercial workloads

Performance characterization of a Quad Pentium Pro SMP using OLTP workloads

Execution characteristics of desktop applications on Windows NT

An analysis of database workload performance on simultaneous multithreaded processors

An analysis of correlation and predictability

Branch prediction based on universal data compression algorithms

Modeling program predictability

Multi-level texture caching for 3D graphics hardware

Declustered disk array architectures with optimal and near-optimal parallelism

Confidence estimation for speculation control

Pipeline gating

Memory dependence prediction using store sets

Dynamic history-length fitting

Accurate indirect branch prediction

Using prediction to accelerate coherence protocols

Increasing TLB reach using superpages backed by shadow memory

Options for dynamic address translation in COMAs

Integrated predicated and speculative execution in the IMPACT EPIC architecture

Threaded multiple path execution

Selective eager execution on the PolyPath architecture

Improving trace cache effectiveness with branch promotion and trace packing

The effect of instruction fetch bandwidth on value prediction

Dynamic IPC/clock rate optimization

Performance modeling and code partitioning for the DS architecture

Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor

Effects of architectural and technological advances on the HP/Convex Exemplar's memory and communication performance

Design choices in the SHRIMP system

Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors

Exploiting spatial locality in data caches using spatial footprints

Low load latency through sum-addressed memory (SAM)

Analytic evaluation of shared-memory systems with ILP processors

Volume 26, Issue 2, May 1998

Volume 26, Issue 1, March 1998

Performance characterization of a Quad Pentium Pro SMP using OLTP workloads

Content Provider	ACM Digital Library
Author	Baker, Walter E. He, Yong Qiang Patterson, David A. Keeton, Kimberly Raphael, Roger C.
Abstract	Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these differences is that computers optimized for technical workloads may not provide good performance for commercial applications, and these applications may not fully exploit advances in processor design. To evaluate these issues, we use hardware counters to measure architectural features of a four-processor Pentium Pro-based server running a TPC-C-like workload on an Informix database. We examine the effectiveness of out-of-order execution, branch prediction, speculative execution, superscalar issue and retire, caching and multiprocessor scaling. We find that out-of-order execution, superscalar issue and retire, and branch prediction are not as effective for database workloads as they are for technical workloads, such as SPEC. We find that caches are effective at reducing processor traffic to memory; even larger caches would be helpful to satisfy more data requests. Multiprocessor scaling of this workload is good, but even modest bus utilization degrades application memory latency, limiting database throughput.
Starting Page	15
Ending Page	26
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/279361.279364
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	26
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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