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Transtional Delectric Layer to Improve Reliability and Performance of High Delectric Constant Transistors Field of the Invention
| Content Provider | Semantic Scholar |
|---|---|
| Copyright Year | 2017 |
| Abstract | A gate dielectric structure (201) fabrication process includes forming a transitional dielectric film (205) overlying a silicon oxide film (204). A high dielectric constant film (206) is then formed overlying an upper Surface of the transitional dielectric film (205). The composition of the transitional dielectric film (205) at the silicon oxide film (204) interface primarily comprises silicon and oxygen. The high K dielec tric (206) and the composition of the transitional dielectric film (205) near the upper surface primarily comprise a metal element and oxygen. Forming the transitional dielectric film (205) may include forming a plurality of transitional dielec tric layers (207) where the composition of each successive transitional dielectric layer (207) has a higher concentration of the metal element and a lower concentration of silicon. Forming the transitional dielectric layer (205) may include performing multiple cycles of an atomic layer deposition process (500) where a precursor concentration for each cycle differs from the precursor concentration of the preceding cycle. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://patentimages.storage.googleapis.com/80/39/75/a676fa68c50971/US20060220157A1.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Patent |
