NDLI: Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis

Content Provider	IET Digital Library
Author	Gassoumi, Ismail Touil, Lamjed Ouni, Bouraoui
Abstract	Quantum dot cellular automata (QCA) is a hopeful technology in the field of nanotechnology that seems to suite well with signal-processing needs. It is concerned with great interest because of its benefits such as ultra-low power consumption, small size and can operate at one Terahertz. The multiply accumulator (MAC) unit is considered as one of the essential operations in digital signal processing (DSP). In the real-time DSP systems, several applications like speech processing, video coding, and digital filtering etc. require MAC operations. However, the power dissipation and area are the most significant aspects in these systems. Here, the authors design low power MAC unit based on QCA technology. QCADesigner version 2.0.3 is used to validate the accuracy of the proposed circuit. The reliability of this unit is taken at different temperatures. The power dissipation is estimated using QCAPro tool. The total power consumed by this unit is 2.183 μW. The proposed circuit has 90% improvement in terms of power over complementary metal–oxide–semiconductor (CMOS) circuits. Since the works in the field of QCA logic signal processing has started to progress, the suggested contribution will give rise to a new thread of research in the field of real-time signal and image treatment.
Starting Page	534
Ending Page	543
Page Count	10
ISSN	1751858X
Volume Number	13
e-ISSN	17518598
Issue Number	Issue 4, Jul (2019)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/13/4
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2018.5196
Journal	IET Circuits, Devices & Systems
Publisher Date	2019-02-04
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Cellular Automata CMOS Circuit CMOS Integrated Circuit CMOS Logic Circuit Complementary Metal–oxide–semiconductor Circuits Digital Circuit Design, Modelling And Testing Digital Filter Digital Filtering Digital Signal Processing Digital Signal Processing Chips Electrical/electronic Equipment Energy Utilisation Image Treatment Logic And Switching Circuit Logic Circuit Logic Design Method Low Power Electronics Low Power MAC Unit Multiply Accumulator Unit Nanotechnology Power 2.183 MuW Power Dissipation Analysis QCA Logic Signal Processing QCA Technology QCADesigner Version 2.0.3 QCAPro Tool Quantum Dot Cellular Automata Quantum Dots Real-time DSP System Real-time Signal Speech Processing Ultra-low Power Consumption Video Coding
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Fault-tolerant design and analysis of QCA-based circuits

Efficient design of BinDCT in quantum-dot cellular automata (QCA) technology

Dual-edge triggered JK flip-flop with comprehensive analysis in quantum-dot cellular automata

A Majority Gate Based RAM Cell design with Least Feature Size in QCA

An Efficient Layout Design of Fredkin Gate in Quantum-dot Cellular Automata (QCA)

Implementation of the new SCV method in quantum-dot cellular automata

Volume 2 Number 1March 2012 Exploring Quantum Dot Cellular Automata Based Reversible Circuit

Design of non-restoring binary array divider in quantum-dot cellular automata

Wire crossing constrained QCA circuit design using bilayer logic decomposition

Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis

Similar Documents

Fault-tolerant design and analysis of QCA-based circuits

Efficient design of BinDCT in quantum-dot cellular automata (QCA) technology

Dual-edge triggered JK flip-flop with comprehensive analysis in quantum-dot cellular automata

A Majority Gate Based RAM Cell design with Least Feature Size in QCA

An Efficient Layout Design of Fredkin Gate in Quantum-dot Cellular Automata (QCA)

Implementation of the new SCV method in quantum-dot cellular automata

Volume 2 Number 1March 2012 Exploring Quantum Dot Cellular Automata Based Reversible Circuit

Design of non-restoring binary array divider in quantum-dot cellular automata

Wire crossing constrained QCA circuit design using bilayer logic decomposition

Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis