NDLI: Reducing false conflicts in signature-based eager hardware transactional memory

Content Provider	IET Digital Library
Author	Kang, Jinku Jung, Jaeil Lee, Inhwan
Abstract	The use of a conflict-address buffer (CAB) for reducing false conflicts in signature-based eager hardware transactional memory (HTM) is proposed. On the basis of the observation that most conflicts occur when accessing a very small set of addresses, the CAB captures those addresses that generate a conflict at runtime and performs more precise conflict detection for the captured addresses. Using the CAB can reduce false conflicts and the associated unnecessary transaction aborts and, consequently, improve the performance of the multicore processors that implement the signature-based eager HTM. When running the Stanford transactional applications for multiprocessing (STAMP) benchmark on a 16-core processor that implements the LogTM-SE, the speedup (decrease in execution time) achieved with a 4-entry CAB is 9.4% on average.
Starting Page	1821
Ending Page	1823
Page Count	3
ISSN	00135194
Volume Number	50
e-ISSN	1350911X
Issue Number	Issue 24, Nov (2014)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/50/24
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2014.3375
Journal	Electronics Letters
Publisher Date	2014-11-13
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	CAB Concurrency Control Conflict-address Buffer False Conflict Detection LogTM-SE Multi-threading Multiprocessing System Parallel Programming Parallel Software Signature-based Eager Hardware Transactional Memory Signature-based Eager HTM STAMP Benchmark Stanford Transactional Application For Multiprocessing Benchmark
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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