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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Titos, J.R. Acacio, M.E. Garcia, J.M. |
| Copyright Year | 2008 |
| Description | Author affiliation: Univ. de Murcia, Murcia (Titos, J.R.; Acacio, M.E.; Garcia, J.M.) |
| Abstract | The difficulty of multithreaded programming remains a major obstacle for programmers to fully exploit multicore chips. Transactional memory has been proposed as an abstraction capable of ameliorating the challenges of traditional lock-based parallel programming. Hardware transactional memory (HTM) systems implement the necessary mechanisms to provide transactional semantics efficiently. In order to keep hardware simple, current HTM designs apply fixed policies that aim at optimizing the most expected application behaviour, and many of these proposals explicitly assume that commits will be clearly more frequent than aborts in future transactional workloads. This paper shows that some applications developed under the TM programming model are by nature prone to experience many conflicts. As a result, aborted transactions can get to be common and may seriously hurt performance. Our characterization, performed with truly transactional benchmarks on the LogTM system, shows that certain programs composed by large transactions suffer indeed very high abort rates. Thus, if TM is to unburden developers from the programmability-performance trade-off, HTM systems must obtain good performance levels in the presence of frequent aborts, requiring more flexible policies of data versioning as well as more sophisticated recovery schemes. |
| Starting Page | 30 |
| Ending Page | 37 |
| File Size | 293543 |
| Page Count | 8 |
| File Format | |
| ISBN | 9780769530895 |
| ISSN | 10666192 |
| DOI | 10.1109/PDP.2008.63 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-02-13 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Programming profession Hardware Parallel programming Parallel processing Application software Program processors Multicore processing Costs Runtime Design optimization abort Transactional Memory hardware conflict |
| Content Type | Text |
| Resource Type | Article |
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