NDLI: Dynamic current mode logic based flip-flop design for robust and low-power security integrated circuits

Content Provider	IET Digital Library
Author	Shen, Jizhong Geng, Liang Zhang, Fan
Abstract	Side-channel analysis (SCA) is a powerful technique to reveal the secrets using detectable physical leakages from logic elements, which brings severe security threats to modern circuits. To alleviate this problem, applying cell-level countermeasure is usually a suitable solution, which is mainly implemented as dual-rail precharge logic. Mace et al. has the proposed dynamic current mode logic (DyCML) scheme as a novel technology to resist SCA, whose power consumption is constant regardless of the data processed. However, the DyCML-based sequential elements are still in blank field. So, we have implemented a novel flip-flop compatible with DyCML, whose enhanced security has been proved by corresponding simulations.
Starting Page	1236
Ending Page	1238
Page Count	3
ISSN	00135194
Volume Number	53
e-ISSN	1350911X
Issue Number	Issue 18, Aug (2017)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/53/18
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2017.2415
Journal	Electronics Letters
Publisher Date	2017-08-04
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Cell-level Countermeasure Digital Circuit Design, Modelling And Testing Dual-rail Precharge Logic DyCML-based Sequential Element Dynamic Current Logic-based Flip-flop Design Dynamic Current Mode Logic Scheme Flip Flops Logic And Switching Circuit Logic Circuit Logic Design Method Logic Element Low Power Electronics Low-power Security IC Physical Leakages Power Consumption Robust Security IC SCA Security Threats Side-channel Analysis
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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