NDLI: Phase noise prediction for static frequency dividers and ring oscillators

Content Provider	IET Digital Library
Author	Dyskin, A. Kallfass, I.
Abstract	This Letter presents a method of predicting the phase noise limits of static frequency dividers. The proposed phase noise model for free-running and injection-locked modes is based on the circuit parameters only. The model provides an intuitive comprehension of the phase noise behaviour of static frequency dividers and is proved to be useful in primary hand calculations. The method was verified against measurement results of a static frequency divider-by-two, operated at 77 GHz and fabricated in a SiGe 0.13 μ m process.
Starting Page	1427
Ending Page	1428
Page Count	2
ISSN	00135194
Volume Number	54
e-ISSN	1350911X
Issue Number	Issue 25, Dec (2018)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/54/25
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2018.6498
Journal	Electronics Letters
Publisher Date	2018-11-01
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	BiCMOS Integrated Circuit Bipolar Integrated Circuit Converter Field Effect MIMIC Free-running Mode Frequency 77.0 GHz Frequency Divider Ge-Si Alloy Injection Locked Oscillator Injection-locked Mode Integrated Circuit Modelling Layout Microwave IC Millimetre Wave Frequency Converter Millimetre Wave Oscillator Mixed Technology Integrated Circuit Modelling And Testing Oscillator Phase Noise Phase Noise Behaviour Phase Noise Limits Phase Noise Model Phase Noise Prediction Semiconductor Integrated Circuit Design SiGe Size 0.13 Mum Static Frequency Divider
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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