NDLI: Grouping-Based Dynamic Power Management for Multi-threaded Programs in Chip-Multiprocessors

Content Provider	IEEE Xplore Digital Library
Author	Mu-Kai Huang Chang, J.M. Wei-Mei Chen
Copyright Year	2009
Abstract	In the embedded systems field, the research focus has shifted from performance to considering both performance and power consumption. Previous research has investigated methods to forecast the processing behavior of programs and adopt Dynamic Voltage and Frequency Scaling (DVFS) technique to adjust the frequency of processor to meet the needs of various phase behavior of threads of programs. However few researches have paid attention to the overhead of DVFS. Generally, DVFS brings processor core unavailable time from 10 us to 650 us. Adjusting frequency for every thread may encounter unanticipated overhead especially for multi-threaded programs.The objective of this study is to take performance, power consumption and overhead into consideration and give a low overhead power management that adjusts the frequency of processor for every group of threads instead of every thread. The proposed approach consists of three works: phase behavior prediction, DVFS controlling and workload migration. To demonstrate the effect of our approach, we implemented these works on a real Linux system and compared our approach with the system without DVFS and the system with DVFS for every thread. The results present that our approach improves 15-40% power consumption with 2-10% performance penalty. Moreover, it can reduce 94-97.5% processor core unavailable time, more than the system with DVFS for every thread.
Starting Page	56
Ending Page	63
File Size	2580764
Page Count	8
File Format	PDF
ISBN	9781424453344
DOI	10.1109/CSE.2009.48
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-08-29
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Regulators Costs Power system management Embedded system Frequency Dynamic voltage scaling Energy management Yarn Power engineering and energy
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in