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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Falub, C.V. Isa, F. Kreiliger, T. Bergamaschini, R. Marzegalli, A. Taboada, A.G. Chrastina, D. Isella, G. Muller, E. Niedermann, P. Dommann, A. Neels, A. Pezous, A. Meduna, M. Miglio, L. von Kanel, H. |
| Copyright Year | 2012 |
| Abstract | Monolithic integration of dissimilar materials with Si microelectronics by hetero-epitaxial growth, a process by means of which all the components are manufactured on the same piece of Si substrate, has been an active research topic for many years. The epitaxial growth of layers differing in lattice parameter and thermal expansion coefficients poses, however, a number of problems detrimental to device processing, yield and performance, such as dislocations, wafer bowing or even layer cracks. The latter become especially relevant at larger layer thicknesses, required for a number of applications, such as high-brightness LEDs, power electronic devices, multi-junction solar cells. We eliminated these disadvantages by a new approach in which layers are partitioned into arrays of disconnected single crystals by a mechanism of self-limited lateral growth. Our approach, tested so far for group IV epitaxy, consists of the following steps. First a Si substrate is patterned into high-aspect ratio pillars or ridges by conventional photolithography and deep reactive ion etching, to expose limited areas on which to grow Ge and Si1-xGex layers. Subsequent epitaxial growth by low energy plasma enhanced chemical vapor deposition (LEPECVD) takes advantage both of geometric shielding of the growth species arriving at the patterned substrate surface, as well as of growth parameters (e.g. low temperature, high growth rate) designed to limit the surface diffusion length, thus favoring vertical over lateral growth. This results in a uniform space-filling array of three dimensional epitaxial crystals. Surprisingly, the observed self-limited lateral expansion leaves an air gap between the neighboring crystals of the order of just several tens of nanometers, thus preventing their coalescence. The formation of these arrays was found to be remarkably independent of the thickness of the deposit and the details of the substrate patterns. It does not even depend on the lattice and thermal mismatch, as a comparison of pure Si, Si0.6Ge0.4 alloy and pure Ge crystal arrays shows. Threading dislocations are expelled to the edges of faceted crystals, leaving the bulk of the material defect-free. Cracks can neither form nor propagate, and wafer bending, often precluding further processing, is minimized. The crystalline quality, tilt and strain of the Ge and Si1-xGex crystals were investigated by high resolution X-ray diffraction (XRD) with reciprocal space mapping (RSM) around the Si(004) and Si(224) reflections. The results provided evidence for the nearly perfect crystal structure of the epitaxial material, and showed the crystals grown on the Si pillars to be strain-free. Synchrotron submicron diffraction experiments performed with a focused (~300x500 nm) X-ray beam revealed tilted small tilt of epitaxial Ge crystals with respect to the Si pillars. Faceted crystals with height, size and shape tunable over a wide range by growth and substrate parameters, are shown to be defect-free by transmission electron microscopy and defect etching. The electrical properties of p-i-n heterojunctions between the epitaxial crystals and the Si-substrate and the interplay between surface and volume effects were investigated by in-situ SEM conductivity experiments. The measured I-V characteristics showed clear diode behavior with dark currents of the order of 10^-4 A/cm2. While we have provided the proof of concept only for group IV semiconductors, we believe the new mode of hetero-epitaxial crystal growth to be applicable to most materials combinations used for the fabrication of semiconductor devices. The novel approach opens up the possibility of fabricating monolithically integrated X-ray or particle detectors requiring tens or even hundreds of microns of epitaxial material. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 721401 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781457718649 |
| e-ISBN | 9781457718656 |
| e-ISBN | 9781457718632 |
| DOI | 10.1109/ISTDM.2012.6222457 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-06-04 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Crystals Silicon Epitaxial growth Substrates Physics Surface treatment |
| Content Type | Text |
| Resource Type | Article |
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