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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kah Hou Chan Riddet, C. Watling, J.R. Asenov, A. |
| Copyright Year | 2012 |
| Abstract | The introduction of high mobility channel materials in future CMOS beyond the 15nm technology generation appears in the ITRS as an increasingly viable option to maintain or boast performance for aggressively scaled devices, with Ge being a strong candidate for p-channel transistors. The implant free quantum well (IFQW) device architecture is an attractive vehicle for this development as the confinement in the channel alleviates off-state leakage resulting from the small bandgap of the material. Additionally, the performance can be further boasted by the introduction of biaxial and uniaxial strain, and/or by exploitation of alternate substrate and channel orientations. Previous simulation studies of a 20nm gate length IFQW device have considered the impact of the spacer separating the gate from the raised source and drain regions. In this work the study is extended to consider how interface roughness from the gate stack, the introduction of biaxial compressive strain from a Si0.2Ge0.8 substrate and transition to a (110) surface orientation from the standard (001) can influence performance in terms of low field mobility and on current. Full band Monte Carlo transport simulations are used, with a 6 band k•p bandstructure and scattering from inelastic acoustic (IAP), optical (IOP) and SO phonons, ionized impurities and surface roughness (SR), calibrated to experimental data. Simulations of bulk Ge under the influence of strain (sGe) were conducted previously to identify the optimal orientation in terms of low field mobility with only IAP and IOP scattering. These results are summarized, giving mobility as a function of strain for the standard (001)<110> orientation along with [110] and [100] channels on a (110) substrate, which represent the best and poorest enhancement for sGe. For inversion layer mobility, the same trend is shown at low fields, with the (110)<-110> orientation still optimal. For low energy carriers it is observed that the velocity parallel to the interface is almost entirely positive for this orientation, enhancing mobility. A comparison of the velocity in rGe in the direction of the current flow is shown to illustrate this point. For device simulations (rGe only), there is a change in the optimal orientation, with the (110)<00-1> substrate/channel directions being preferable in terms of ION at high VD (SR scattering neglected). This is due to higher carrier energies accessing areas of the bandstructure where the velocity is larger. Introduction of SR scattering degrades this enhancement. This suggests that the increased scattering negates the benefits derived from the change in orientation. Simulations of a sGe channel device are underway to examine potential the ION enhancement. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 209544 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781457718649 |
| e-ISBN | 9781457718656 |
| e-ISBN | 9781457718632 |
| DOI | 10.1109/ISTDM.2012.6222450 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-06-04 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Strontium Monte Carlo methods Scattering Implants Logic gates Substrates Strain |
| Content Type | Text |
| Resource Type | Article |
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