NDLI: An extension to DAG based scheduling for partial dependent tasks An Approach to optimize partial dependent tasks in a distributed system

Content Provider	IEEE Xplore Digital Library
Author	Shweta, M.A. Eeratta, R. Shenoy, S.S.
Copyright Year	2012
Description	Author affiliation: CTDC INDIA TEC, Siemens Technol. & Services Pvt. Ltd., Bangalore, India (Shweta, M.A.; Eeratta, R.; Shenoy, S.S.)
Abstract	Real time applications are now utilizing the computational power of multiprocessor and distributed systems [1] to improve their performance. Usually, these applications solve either data-intensive or compute-intensive problems. Applications executing on distributed systems provide faster response time than running on a stand-alone machine. For an application to execute on a distributed system it has to be decomposable into small and independent tasks, where a task is a single independent unit of execution. These tasks can be distributed to various nodes on a HPC[2] grid or cluster for faster execution. The task allocation to processors on a distributed or multiprocessor system is an NP hard problem [3] and determining an optimal solution has exponential complexity. Some problems cannot be completely decomposable into independent tasks due to the nature of application; this is due to the interdependencies of the tasks. Even if the application is not completely parallelizable, it will execute faster than executing it sequentially, if some of the tasks execute in parallel. As part of this paper, we describe an approach for scheduling tasks on a distributed environment by resolving the partial dependent tasks using the Directed Acyclic Graphs (DAG) [4] and Matrix Manipulation.
Sponsorship	IEEE Stand. Assoc.
Starting Page	193
Ending Page	197
File Size	721743
Page Count	5
File Format	PDF
ISBN	9781467322706
e-ISBN	9781467322720
DOI	10.1109/INDCON.2012.6420614
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-07
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flowcharts Program processors Processor scheduling Software algorithms Computer architecture Scheduling
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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