NDLI: An automated test framework for experimenting with stochastic behavior in reconfigurable logic

Content Provider	IEEE Xplore Digital Library
Author	Birklykke, A.A. Le Moullec, Y. Alminde, L.K. Prasad, R.
Copyright Year	2012
Description	Author affiliation: GomSpace APS, Niels Jernes Vej 10, DK-9220 Aalborg Ø (Alminde, L.K.) \|\| Department of Electronic Systems, Aalborg University, Fredrik Bajers Vej 7, DK-9220 Aalborg Ø (Birklykke, A.A.; Le Moullec, Y.; Prasad, R.)
Abstract	In this paper, we present an automated test framework for the characterization of stochastic behavior in logic circuits. The framework is intended as a platform for experimenting with and providing statistics on digital architectures given behavioral uncertainties at the gate-level. As an experimental platform, we propose to use an FPGA due to the proven value of reconfigurable architectures in design space exploration. We hypothesize that stochastic behavior can be introduced in FPGAs using external noise sources; a fact that is later confirmed by characterizing the behavior of an FPGA IO block subject to voltage/frequency scaling and Vdd-noise. The framework provides easy interfacing with laboratory equipment, design of experiment capabilities and automatic test execution, thus providing a powerful tool for characterizing stochastic behavior in reconfigurable logic.
Starting Page	1
Ending Page	6
File Size	761430
Page Count	6
File Format	PDF
ISBN	9781467329194
e-ISBN	9781467329217
DOI	10.1109/ReConFig.2012.6416729
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-05
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Uncertainty Noise Vectors Software Timing Field programmable gate arrays Clocks
Content Type	Text
Resource Type	Article

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