NDLI: Tunable stochastic computing using layered synthesis and temperature adaptive voltage scaling

Content Provider	IEEE Xplore Digital Library
Author	Gala, N. Devanathan, V.R. Visvanathan, V. Gandhi, V. Kamakoti, V.
Copyright Year	2013
Description	Author affiliation: Texas Instrum. India Pvt. Ltd., Bangalore, India (Devanathan, V.R.; Visvanathan, V.) \|\| Dept. of Comput. Sci. & Eng., Indian Inst. of Technol. Madras, Chennai, India (Gala, N.; Gandhi, V.; Kamakoti, V.)
Abstract	With increasing computing power in mobile devices, conserving battery power (or extending battery life) has become crucial. This together with the fact that most applications running on these mobile devices are increasingly error tolerant, has created immense interest in stochastic (or inexact) computing. In this paper, we present a framework wherein, the devices can operate at varying error tolerant modes while significantly reducing the power dissipated. Further, in very deep sub-micron technologies, temperature has a crucial role in both performance and power. The proposed framework presents a novel layered synthesis optimization coupled with temperature aware supply and body bias voltage scaling to operate the design at various “tunable” error tolerant modes. We implement the proposed technique on a H.264 decoder block in industrial 28nm low leakage technology node, and demonstrate reductions in total power varying from 30% to 45%, while changing the operating mode from exact computing to inaccurate/error-tolerant computing.
Starting Page	103
Ending Page	112
File Size	2651081
Page Count	10
File Format	PDF
e-ISBN	9781479913145
DOI	10.1109/ASQED.2013.6643572
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-08-26
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Stochastic Computing Stochastic processes Layered Synthesis Tunable Computing Adaptive Supply Voltage Low Power Computing Optimization Power Grid Computer architecture Logic gates Functional Criticality Delays Mathematical model
Content Type	Text
Resource Type	Article

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