NDLI: FSM based Manchester encoder for UHF RFID tag emulator

Content Provider	IEEE Xplore Digital Library
Author	Khan, M.A. Sharma, M. Brahmanandha, P.R.
Copyright Year	2008
Description	Author affiliation: Commun. Res. Centre, Minist. of Commun. & I.T., Noida (Khan, M.A.; Sharma, M.; Brahmanandha, P.R.)
Abstract	The radio frequency identification system (RFID) is becoming one of the most popular system in wireless technologies. The UHF RFID tag emulator is a part of RFID testing tools. The UHF RFID tag emulator would be imitating the behavior of RFID Tag. The UHF RFID tag emulator (860 MHz to 960 MHz) is aimed for testing the RFID systems and also acts as a general-purpose data transport device for other RFID systems. The tag emulator belongs to the EPC class-III (semi-passive) tags, but it implements the Class-1Generation II (C1G2) air interface protocol for communicating with the reader. In this work, we have presented RTL design of Manchester encoder. As motivated by Finite State Machine (FSM) and RTL implementations of encoder are discussed with particular focus to use the RFID Emulator as data transport device and debugging tool. The synthesis result shows that FSM design is efficient (less area and high speed) and it operates at a maximum frequency of 256.54 MHz.
Starting Page	1
Ending Page	6
File Size	2420995
Page Count	6
File Format	PDF
ISBN	9781424435944
DOI	10.1109/ICCCNET.2008.4787699
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System testing Frequency synthesizers FSM Protocols Communication system control Debugging Control systems RFID Emulator RTL Communication system security RFID tags UHF Manchester Hardware Radiofrequency identification
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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