NDLI: Pre-Settable Adiabatic Flip-Flops and Sequential Circuits

Content Provider	IEEE Xplore Digital Library
Author	Jianping Hu Jing Dai Weiqiang Zhang Yangbo Wu
Copyright Year	2006
Description	Author affiliation: Fac. of Inf. Sci. & Technol., Ningbo Univ. (Jianping Hu; Jing Dai; Weiqiang Zhang; Yangbo Wu)
Abstract	In this paper, the design of pre-settable adiabatic flip-flops and sequential circuits based on the two-phase CPAL (complementary pass-transistor adiabatic logic) is presented. The two-phase CPAL is more suitable for the design of flip-flops and sequential circuits, as it uses fewer transistors than the conventional CMOS implementation and the other adiabatic logic circuits. Pre-settable adiabatic flip-flops (D and T) based on the two-phase CPAL are proposed. Adiabatic flip-flops with a reset line are more universal and suitable for the design of sequential circuits. A practical sequential system realized with the proposed pre-adiabatic flip-flops is demonstrated. SPICE simulations show that the energy loss of the proposed pre-settable adiabatic flip-flop and sequential circuits is greatly reduced compared to the conventional CMOS implementation
Sponsorship	IEEE Circuits and Syst. Soc. HKUST UESTC City Univ. of Hong Kong
Starting Page	2299
Ending Page	2303
File Size	5012797
Page Count	5
File Format	PDF
ISBN	0780395840
DOI	10.1109/ICCCAS.2006.285137
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-06-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy loss Information science CMOS logic circuits Logic circuits Voltage Capacitance SPICE Logic design Sequential circuits Flip-flops
Content Type	Text
Resource Type	Article

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