NDLI: On design of a highly secure PUF based on non-linear current mirrors

Content Provider	IEEE Xplore Digital Library
Author	Kumar, R. Burleson, W.
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA (Kumar, R.; Burleson, W.)
Abstract	Physically Unclonable Functions (PUFs) are lightweight hardware security primitives for generating unique signatures from the unpredictable nature of silicon. However, most of the proposed PUFs have been shown to be vulnerable to modeling attacks, especially against Machine Learning algorithms. A subset of challenge-response pairs can leak the required information to break a PUF due to the presence of a linear separating boundary between the PUF responses. In this paper, we propose a strong and secure PUF based on non-linear current mirrors. The fundamental idea is to propagate a current through two identical chains of non-linear current mirrors. The current through a single stage is shifted by some amount based on the strength of the input current. As the current shift is not a fixed value anymore, strong non-linearity is introduced into the challenge-response relationship. The proposed PUF shows excellent properties upon statistical circuit simulation. The average inter-distance and intra-distance of the proposed PUF are 49.9% and 0.8% respectively. One of the most striking features of the proposed PUF is the low information leakage measured in terms of its modeling attack resistance. By employing Support Vector Machine (SVM) based attacks, we observed that the proposed PUF is almost 10-30x stronger than the delay-based PUFs. Moreover, the current mode nature of the PUF circuit enables low power operation. The proposed PUF consumes about 15% lower energy than an arbiter PUF to produce a single response bit.
Starting Page	38
Ending Page	43
File Size	283913
Page Count	6
File Format	PDF
e-ISBN	9781479941124
DOI	10.1109/HST.2014.6855565
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-05-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Support vector machines Machine learning algorithms Hardware security Modeling attacks PUFs Delays Mirrors Security Reliability Integrated circuit modeling
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Reliable Delay Based Algorithm to Boost PUF Security Against Modeling Attacks

A Case of Lightweight PUF Constructions: Cryptanalysis and Machine Learning Attacks

Hybrid modeling attacks on current-based PUFs

Design of Unique and Reliable Physically Unclonable Functions Based on Current Starved Inverter Chain

Modeling Attacks on Physical Unclonable Functions (2010)

Puf modeling attacks on simulated and silicon data (2013).

Highly secure strong puf based on nonlinearity of mosfet subthreshold operation.

Machine learning attacks on 65nm Arbiter PUFs: Accurate modeling poses strict bounds on usability

Security Evaluation of n-Choose-k-Sum PUFs Against Modeling Attacks

On design of a highly secure PUF based on non-linear current mirrors

Similar Documents

Reliable Delay Based Algorithm to Boost PUF Security Against Modeling Attacks

A Case of Lightweight PUF Constructions: Cryptanalysis and Machine Learning Attacks

Hybrid modeling attacks on current-based PUFs

Design of Unique and Reliable Physically Unclonable Functions Based on Current Starved Inverter Chain

Modeling Attacks on Physical Unclonable Functions (2010)

Puf modeling attacks on simulated and silicon data (2013).

Highly secure strong puf based on nonlinearity of mosfet subthreshold operation.

Machine learning attacks on 65nm Arbiter PUFs: Accurate modeling poses strict bounds on usability

Security Evaluation of n-Choose-k-Sum PUFs Against Modeling Attacks

On design of a highly secure PUF based on non-linear current mirrors