NDLI: A novel forward body biasing technique for subthreshold ring oscillators

Content Provider	IEEE Xplore Digital Library
Author	Yuan Chang Chouhan, S.S. Halonen, K.
Copyright Year	2015
Description	Author affiliation: Dept. of Micro & Nano Sci., Aalto Univ., Espoo, Finland (Yuan Chang; Chouhan, S.S.; Halonen, K.)
Abstract	In this paper, a new forward body biasing scheme is proposed for CMOS inverters used in subthreshold ring oscillators (ROs). In the proposed scheme by using auxiliary transistors higher forward body biasing voltage magnitudes are achieved compared with the conventional forward body biasing (FBB) schemes. In the literature swapped body biasing (SBB) and dynamic threshold MOSFET (DTMOS) are conventionaly used to obtain forward body biasing in the transistor. Three-stage ROs are designed for the target frequency of 13.56 MHz by using the proposed and the conventional FBB techniques in CMOS inverters. The architectures are implemented in a standard 0.18 μm CMOS technology. Post layout simulations (PLS) are performed using the Cadence Spectre simulator. The power dissipation is selected as a figure of merit (FOM) to evaluate the performances of ROs. PLS results show that with subthreshold supply voltages, the RO using the proposed forward biasing scheme consumes 451nW of power. This power dissipation is 30% less compared with SBB based RO and 48% less compared with DTMOS based RO.
Starting Page	1
Ending Page	4
File Size	360957
Page Count	4
File Format	PDF
e-ISBN	9781479998777
DOI	10.1109/ECCTD.2015.7300127
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-08-24
Publisher Place	Norway
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Ring oscillators Capacitors Inverters Threshold voltage CMOS integrated circuits Transistors MOS devices
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in