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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kasapaki, E. Sparso, J. |
| Copyright Year | 2015 |
| Description | Author affiliation: Dept. of Appl. Math. & Comput. Sci., Tech. Univ. of Denmark, Lyngby, Denmark (Kasapaki, E.; Sparso, J.) |
| Abstract | Argo is a network-on-chip developed for use in a multi-core platform designed specifically for hard real-time applications and it supports message passing across virtual end-to-end channels. Argo implements these channels using time-division-multiplexing (TDM) of the resources in the NOC following a static schedule. This requires some form of global synchrony across the platform. At the same time it is generally accepted that a large chip should employ some form of globally-asynchronous locally-synchronous (GALS) organization. By using asynchronous routers and by rethinking the microarchitecture of the network interfaces we have managed to combine TDM and GALS and obtain a very hardware-efficient implementation of the NOC. The paper gives a brief overview of the Argo NOC and focuses on two important issues: how to safely bring the NOC out of reset and timing analysis of the network of asynchronous routers. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 192024 |
| Page Count | 4 |
| File Format | |
| e-ISBN | 9781479998777 |
| DOI | 10.1109/ECCTD.2015.7300101 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-08-24 |
| Publisher Place | Norway |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Latches Pipelines Time division multiplexing Nickel Real-time systems Timing Clocks |
| Content Type | Text |
| Resource Type | Article |
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