NDLI: Surfing front-end architectures for ultrasound imaging systems

Content Provider	IEEE Xplore Digital Library
Author	Wang, P. Ytterdal, T. Halvorsrod, T.M.
Copyright Year	2015
Description	Author affiliation: GE Vingmed Ultrasound AS, Horten, Norway (Halvorsrod, T.M.) \|\| Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway (Wang, P.; Ytterdal, T.)
Abstract	This paper proposes two surfing architectures of the front-end for cardiac ultrasound imaging systems by removing the high voltage (HV) transmitter/receiver (Tx/Rx) switch in traditional ultrasound imaging systems, and connecting the input and the local ground of the Rx to the output of the Tx directly. Both advantages and challenges are presented. During the emitting phase, the Rx is on reset mode and voltages at all internal nodes in the Rx will follow the transmitting pulse, and this phenomenon exhibits the Rx is in the surf as the transmitting pulse. By removing the Tx/Rx switch, the Rx can avoid saturating status during the pulse emitting phase in Tx, and can receive the reflected echo signals in an efficient way after the emitting phase. While the input of the Rx connecting to the PZT transducer directly without the Tx/Rx switch, the received echo signals will not be distorted by the Tx/Rx switch, and the switched-capacitor (SC) front-end of the Rx can be relaxed in the design. Currently the bulk CMOS technology may not support this architecture because of its intrinsic process limitation and relatively large parasitic capacitance of the PN junctions. SOI CMOS technology could be a feasible CMOS technology because its parasitic capacitance of the PN junction is much smaller and its process is different from the bulk CMOS technology. The simulation is based on an inverter-based SC amplifier in a high voltage 0.18 μm 50 V/1.8 V bulk CMOS technology, and a HV switch is based on a model which cannot be implemented in a bulk CMOS technology.
Starting Page	1
Ending Page	4
File Size	315032
Page Count	4
File Format	PDF
e-ISBN	9781479998777
DOI	10.1109/ECCTD.2015.7300006
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-08-24
Publisher Place	Norway
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	ultrasound imaging system Ultrasonic imaging HV CMOS Imaging Tx/Rx switch Switches CMOS technology CMOS integrated circuits surfing architecture front-end Substrates Parasitic capacitance
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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