NDLI: Optimization of Interacting Controllers Using K-wise Tests

Content Provider	IEEE Xplore Digital Library
Author	Goren, S.
Copyright Year	2007
Description	Author affiliation: Bahccschir Univ., Istanbul (Goren, S.)
Abstract	Digital systems are represented as a network of interacting components, and often their control units are as well modeled as a network of finite-state machines (FSMs). It is possible that when an FSM ( $M_{2}$ ) is driven by another FSM $(M_{1}$ ) as opposed to being driven from outside, some of its states and transitions may never be visited. Such cases may occur when $M_{2}$ is for example designed as a library component and hence is designed to work in a greater context - not only with $M_{1}.$ Hence, $M_{2}$ may be logic-minimized - called hierarchical optimization (HO), or the composite machine, $M_{1}$ rarr $M_{2}$ may be minimized - called global optimization (GO). We do HO as it is faster though sometimes less globally optimal than GO. Compared to the best previous HO method, we are significantly faster. We extract the composite machine $M_{1}$ rarr $M_{2}$ only once. We do combinational simulation as opposed to sequential. Instead of randomly picking from permissible test sequences, we filter out the ones that are k-wise complete. We inject faults and simulate in a topological order and remove multiple redundancies. As a result of our run-time efficiencies, we are also able to handle bigger FSMs than previous literature.
Starting Page	169
Ending Page	174
File Size	3640797
Page Count	6
File Format	PDF
ISBN	9781424418244
DOI	10.1109/IDT.2007.4437453
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-12-16
Publisher Place	Egypt
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Software testing System testing Runtime Minimization methods Digital systems Redundancy Libraries Hardware Reachability analysis Design optimization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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