NDLI: Design of a multi-channel and reconfigurable RF sampling GNSS receiver

Content Provider	IEEE Xplore Digital Library
Author	Barrak, R. Thabet, J. Ghazel, A.
Copyright Year	2015
Description	Author affiliation: Higher Sch. of Commun. of Tunis (Sup'Com), Univ. of Carthage, Ariana, Tunisia (Barrak, R.; Thabet, J.; Ghazel, A.)
Abstract	This paper describes the design of a multi-channel, multi-frequency and reconfigurable GNSS receiver based on RF sampling technique. The design of the receiver RF front-end consists on the determination of the required gain, noise figure and analog to digital converter (ADC) dynamic range and sampling frequency based on GNSS standards specifications. Then, the analysis of noise sources in RF sampling receiver allows specifying the ADC jitter and quantization noise limits. The proposed design methodology is applied to design GPS/GLONASS/GALILEO/COMPASS receiver. Sampling frequency selection is addressed for different scenarios and anti-aliasing filter specifications are derived. Then, appropriate discrete components are selected for the purpose of the construction of a hardware test platform. Refined modeling and advanced simulation of the proposed GNSS receiver on ADS software validate the design method and show the performances of the proposed GNSS receiver.
Starting Page	361
Ending Page	366
File Size	766218
Page Count	6
File Format	PDF
ISBN	9789532900569
DOI	10.1109/SOFTCOM.2015.7314083
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-09-16
Publisher Place	Croatia
Access Restriction	Subscribed
Rights Holder	University of Split, FESB
Subject Keyword	Radio frequency Noise figure Noise budget Noise Receivers noises in Analogue to Digital Converter (ADC) Gain control Global Navigation Satellite System (GNSS) reconfigurable receiver design RF sampling architecture Gain Global Positioning System
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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