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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Po-Hao Chang Chiang, K. Jeng-Yuan Lai Yu-Po Wang Hsiao, C.S. |
| Copyright Year | 2007 |
| Description | Author affiliation: Siliconware Precision Ind. Co. Ltd. No. 123, Taichung (Po-Hao Chang; Chiang, K.; Jeng-Yuan Lai; Yu-Po Wang; Hsiao, C.S.) |
| Abstract | For the high speed substrate design, the impacts of common mode are more and more remarkable, but many designers only consider how to improve a differential mode electrical performance. In the high speed applications, some specifications have defined the standard for common mode performance. In the FCBGA substrates, the capacitance value is quite big near a bumping pad, it causes common mode noise and leads to a signal loss, distortion or error. In this paper, we present a common mode signal pair improvement design for high speed interconnections. |
| Starting Page | 350 |
| Ending Page | 353 |
| File Size | 313785 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424416363 |
| DOI | 10.1109/IMPACT.2007.4433634 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-10-01 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Electromagnetic interference Crosstalk Magnetic noise Capacitance Distortion Noise cancellation Scattering parameters Noise generators Impedance Signal design |
| Content Type | Text |
| Resource Type | Article |
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