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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kanellos, G.T. Alexoudi, T. Fitsios, D. Vagionas, C. Maniotis, P. Papaioannou, S. Miliou, A. Pleros, N. |
| Copyright Year | 2013 |
| Description | Author affiliation: Dept. of Inf., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece (Alexoudi, T.; Fitsios, D.; Vagionas, C.; Maniotis, P.; Papaioannou, S.; Miliou, A.; Pleros, N.) || Inf. Technol. Inst., Center for Res. & Technol. Hellas, Thessaloniki, Greece (Kanellos, G.T.) |
| Abstract | The processor-memory performance gap, commonly referred to as “Memory Wall” problem, owes to the speed mismatch between processor and electronic RAM clock frequencies. In that perspective, optical RAMs storing and retrieving information in the form of light with ps-scale memory access times seem to hold the potential for replacing small-size caches, offering at the same time a cache memory system being fully-compatible with optically interconnected CPU-memory architectures. In this article, we present our recent work on optical RAM cell configurations exploiting silicon-based integrated switching and latching elements with SOAs serving as the active devices. We review both their experimental and underlying theoretical framework and proceed with the demonstration of new optical cache architectural paradigms enabled by the introduction of WDM principles in the storage area. The higher than 40GHz optical RAM cell operational speeds and the WDM-enabled cache architectures comprise two major factors towards realizing ultra-fast and low-power CPU-memory communication. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 1556554 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479906833 |
| ISSN | 21612064 |
| DOI | 10.1109/ICTON.2013.6603029 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-06-23 |
| Publisher Place | Spain |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Random access memory Integrated optics Computer architecture Optical filters Wavelength division multiplexing Logic gates Optical interferometry silicon technology optical RAM optical memory column decoder (CD) row decoder semiconductor optical amplifier (SOA) access gate (AG) |
| Content Type | Text |
| Resource Type | Article |
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