NDLI: LT-RTPG: a new test-per-scan BIST TPG for low heat dissipation

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LT-RTPG: a new test-per-scan BIST TPG for low heat dissipation

Content Provider	IEEE Xplore Digital Library
Author	Wang, S. Gupta, S.K.
Copyright Year	1999
Description	Author affiliation: 3Dfx Interactive, USA (Wang, S.)
Abstract	A new BIST TPG design, called low-transition random TPG (LT-RTPG), that is comprised of an LFSR, a k-input AND gate, and a T flip-flop, is presented. When used to generate test patterns for test-per-scan BIST, it decreases the number of transitions that occur during scan shifting and hence decreases the heat dissipated during testing. Various properties of LT-RTPGs are studied and a methodology for their design is presented. Experimental results demonstrate that LT-RTPGs designed using the proposed methodology decrease the heat dissipated during BIST by significant amounts while attaining high fault coverage, especially for circuits with moderate to large number of scan inputs.
Starting Page	85
Ending Page	94
File Size	1074435
Page Count	10
File Format	PDF
ISBN	0780357531
ISSN	10893539
DOI	10.1109/TEST.1999.805617
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-09-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Built-in self-test Circuit testing Test pattern generators Circuit faults Switching circuits Automatic testing Flip-flops Temperature Inductance Circuit noise
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Electrical and Electronic Engineering

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