NDLI: BETSY: synthesizing circuits for a specified BIST environment

Content Provider	IEEE Xplore Digital Library
Author	Zhe Zhao Pouya, B. Touba, N.A.
Copyright Year	1998
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA (Zhe Zhao)
Abstract	This paper presents a logic synthesis tool called BETSY (BIST Environment Testable SYnthesis) for synthesizing circuits that achieve complete (100%) fault coverage in a user specified BIST environment. Instead of optimizing the circuit for a generic pseudo-random test pattern generator (by maximizing its random pattern testability), the circuit is optimized for a specific test pattern generator, e.g., an LFSR with a specific characteristic polynomial and initial seed. This solves the problem of having to estimate fault detection probabilities during synthesis and guarantees that the resulting circuit achieves 100% fault coverage. BETSY considers the exact set of patterns that will be applied to the circuit during BIST and applies various transformations to generate an implementation that is fully tested by those patterns. When needed, BETSY inserts test points early in the synthesis process in an optimal way and accounts for them in satisfying timing constraints and other synthesis criteria. Experimental results are shown which demonstrate the benefits of optimizing a circuit for a particular test pattern generator.
Starting Page	144
Ending Page	153
File Size	914228
Page Count	10
File Format	PDF
ISBN	0780350936
ISSN	10893539
DOI	10.1109/TEST.1998.743147
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-10-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit synthesis Built-in self-test Circuit testing Test pattern generators Logic testing Circuit faults Logic circuits Polynomials Electrical fault detection Timing
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Electrical and Electronic Engineering

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